Hsieh, Chih-Cheng

CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors

Chen, W.-H., Dou, C., Li, K.-X., Lin, W.-Y., Li, P.-Y., Huang, J.-H., Wang, J.-H., Wei, W.-C., Xue, C.-X., Chiu, Y.-C., et al. (2019) · Nature Electronics

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 276

15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices

Xue, C.-X., Huang, T.-Y., Liu, J.-S., Chang, T.-W., Kao, H.-Y., Wang, J.-H., Liu, T.-W., Wei, S.-Y., Huang, S.-P., Wei, W.-C., et al. (2020) · 2020 IEEE International Solid- State Circuits Conference - (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 230

16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

Su, J.-W., Chou, Y.-C., Liu, R., Liu, T.-W., Lu, P.-J., Wu, P.-C., Chung, Y.-L., Hung, L.-Y., Ren, J.-S., Pan, T., et al. (2021) · 2021 IEEE International Solid-State Circuits Conference (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 207

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

Su, J.-W., Si, X., Chou, Y.-C., Chang, T.-W., Huang, W.-H., Tu, Y.-N., Liu, R., Lu, P.-J., Liu, T.-W., Wang, J.-H., et al. (2020) · 2020 IEEE International Solid- State Circuits Conference - (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 189

16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices

Xue, C.-X., Hung, J.-M., Kao, H.-Y., Huang, Y.-H., Huang, S.-P., Chang, F.-C., Chen, P., Liu, T.-W., Jhang, C.-J., Su, C.-I., et al. (2021) · 2021 IEEE International Solid- State Circuits Conference (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 182

A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

Xue, C.-X., Chiu, Y.-C., Liu, T.-W., Huang, T.-Y., Liu, J.-S., Chang, T.-W., Kao, H.-Y., Wang, J.-H., Wei, S.-Y., Lee, C.-Y., et al. (2020) · Nature Electronics

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 181

Fusion of memristor and digital compute-in-memory processing for energy-efficient edge computing

Wen, T.-H., Hung, J.-M., Huang, W.-H., Jhang, C.-J., Lo, Y.-C., Hsu, H.-H., Ke, Z.-E., Chen, Y.-C., Chin, Y.-H., Su, C.-I., et al. (2024) · Science

Advanced Memory and Neural ComputingParallel Computing and Optimization Techniques

Cited by 131

An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices

Hung, J.-M., Huang, Y.-H., Huang, S.-P., Chang, F.-C., Wen, T.-H., Su, C.-I., Khwa, W.-S., Lo, C.-C., Liu, R.-S., Hsieh, C.-C., et al. (2022) · 2022 IEEE International Solid- State Circuits Conference (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 125