Xue, Cheng-Xin

33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing

Liu, Q., Gao, B., Yao, P., Wu, D., Chen, J., Pang, Y., Zhang, W., Liao, Y., Xue, C.-X., Chen, W.-H., et al. (2020) · 2020 IEEE International Solid- State Circuits Conference - (ISSCC)

Advanced Memory and Neural ComputingAnalog and Mixed-Signal Circuit Design

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CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors

Chen, W.-H., Dou, C., Li, K.-X., Lin, W.-Y., Li, P.-Y., Huang, J.-H., Wang, J.-H., Wei, W.-C., Xue, C.-X., Chiu, Y.-C., et al. (2019) · Nature Electronics

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

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15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices

Xue, C.-X., Huang, T.-Y., Liu, J.-S., Chang, T.-W., Kao, H.-Y., Wang, J.-H., Liu, T.-W., Wei, S.-Y., Huang, S.-P., Wei, W.-C., et al. (2020) · 2020 IEEE International Solid- State Circuits Conference - (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 230

16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices

Xue, C.-X., Hung, J.-M., Kao, H.-Y., Huang, Y.-H., Huang, S.-P., Chang, F.-C., Chen, P., Liu, T.-W., Jhang, C.-J., Su, C.-I., et al. (2021) · 2021 IEEE International Solid- State Circuits Conference (ISSCC)

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 182

A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

Xue, C.-X., Chiu, Y.-C., Liu, T.-W., Huang, T.-Y., Liu, J.-S., Chang, T.-W., Kao, H.-Y., Wang, J.-H., Wei, S.-Y., Lee, C.-Y., et al. (2020) · Nature Electronics

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 181