Zhang, Yiyun

Fudan University · State Key Laboratory of ASIC and System

1 paper on CoChatORCID 0009-0009-9000-9079

Most cited papers

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A fully-integrated 64-channel wireless neural interfacing SoC achieving 110 dB AFE PSRR and supporting 54 Mb/s symbol rate, meter-range wireless data transmission.
Lyu, L., Ye, D., Xu, R., Mu, G., Zhao, H., Xiang, Y., Tu, Y., Zhang, Y., & Shi, C.-J. R. (2020) · IEEE Transactions on Circuits and Systems II: Express Briefs
Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit Design
Cited by 14

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