The DOI matches its Crossref record; 7 of the 7 references it cites were found in a registry or an index.
VPR: a new packing, placement and routing tool for FPGA research
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Citations
Cites
Optimization by Simulated Annealing
Kirkpatrick, S., Gelatt, C. D., & Vecchi, M. P. (1983) · Science · doi:10.1126/science.220.4598.671 · Cited by 45,134
An Algorithm for Path Connections and Its Applications
Lee, C. Y. (1961) · IEEE Transactions on Electronic Computers · doi:10.1109/tec.1961.5219222 · Cited by 1,619
Cong, J., & Ding, Y. (1994) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/43.273754 · Cited by 681
Field-Programmable Gate Arrays
Brown, S. D., Francis, R. J., Rose, J., & Vranesic, Z. G. (1992) · Springer eBooks · doi:10.1007/978-1-4615-3572-0 · Cited by 529
Self-citationRISA: accurate and efficient placement routability modeling
Cheng, C.-L. E. (1994) · International Conference on Computer Aided Design · doi:10.5555/191326.191632 · Cited by 204
Placement and routing tools for the Triptych FPGA
Ebeling, C. W., McMurchie, L., Hauck, S., et al. (1995) · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · doi:10.1109/92.475966 · Cited by 170
Cluster-based logic blocks for FPGAs: area-efficiency vs. input sharing and size
Betz, V., & Rose, J. (2002) · IEEE Custom Integrated Circuits Conference (CICC) · doi:10.1109/cicc.1997.606687 · Cited by 148
Self-citation
Cited by
NanoFabrics: spatial computing using molecular electronics
Goldstein, S. C., & Budiu, M. (2001) · Proceedings of the 28th annual international symposium on Computer architecture - ISCA '01 · doi:10.1145/379240.379262 · Cited by 339
Trimberger, S. M. S. (2018) · IEEE Solid-State Circuits Magazine · doi:10.1109/mssc.2018.2822862 · Cited by 77
Metadata
- Authors
- Betz, V., & Rose, J.
- Venue
- Lecture Notes in Computer Science
- Publisher
- Springer Berlin Heidelberg
- Published
- 1997
- Pages
- 213-222
- ISSN
- 0302-9743 (ISSN-L)
- 1611-3349
- OpenAlex
- W2139637699
- Cited by
- 1,123
- References
- 7
- FWCI
- 42.62
- Type
- conference paper
- Language
- en
- Open access
- closed
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Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
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How to cite
Cite CoChat for the checks on this page, and the paper for its own findings.
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- CoChat. (2026). Citation check: VPR: a new packing, placement and routing tool for FPGA research. https://app.cochat.ai/papers/10.1007/3-540-63465-7_226
- The paper
- Betz, V., & Rose, J. (1997). VPR: a new packing, placement and routing tool for FPGA research. Lecture Notes in Computer Science. https://doi.org/10.1007/3-540-63465-7_226
Data sources
Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
