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An FPGA-based architecture for embedded systems performance acceleration applied to Optimum-Path Forest classifier
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Claims other papers make about this one
Each is checked against this paper’s own text: does it say what the citing paper says it does?
In the citing paper
“The architecture is focused on hardware implementation that decreases global memory access and increases the computation to memory access ratio which improves the overall execution time from 2.18 to 9 times faster than the software version [12].”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [12]
Citations
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References 38 · Cited by 11
Metadata
- Authors
- Diniz, W. F. S., Fremont, V., Fantoni, I., & Nóbrega, E. G. O.
- Affiliations
- Université de Technologie de Compiègne (FR)
- ORCID
- Fantoni, Isabelle
- Venue
- Microprocessors and Microsystems
- Publisher
- Elsevier BV
- Published
- 2017-07
- Volume
- 52
- Pages
- 261-271
- ISSN
- 0141-9331 (ISSN-L)
- OpenAlex
- W2625255572
- Cited by
- 11
- References
- 38
- Citations by year
- 2023: 1 · 2022: 3 · 2021: 4 · 2020: 1 · 2019: 1 · 2017: 1
- FWCI
- 0.95
- Type
- journal article
- Language
- en
- Open access
- green
- hal.science
- Licence
- Locations
- Microprocessors and Microsystems (publishedVersion)
- HAL (submittedVersion, other-oa)
- Funders
- Brazilian Ministry of Education (nº13077/2013-09)
- National Agency for Research (ANR-11-IDEX-0004-02)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Embedded Systems and FPGA Applications
- Physical Sciences › Engineering › Control and Systems Engineering › Embedded Systems and FPGA Design
- Keywords
- optimum-path forest, FPGA acceleration, embedded systems, real-time classification, resource-constrained platforms, system-on-chip design, nonlinear classification
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Cite CoChat for the checks on this page, and the paper for its own findings.
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- CoChat. (2026). Citation check: An FPGA-based architecture for embedded systems performance acceleration applied to Optimum-Path Forest classifier. https://app.cochat.ai/papers/10.1016/j.micpro.2017.06.013
- The paper
- Diniz, W. F. S., Fremont, V., Fantoni, I., & Nóbrega, E. G. O. (2017). An FPGA-based architecture for embedded systems performance acceleration applied to Optimum-Path Forest classifier. Microprocessors and Microsystems. https://doi.org/10.1016/j.micpro.2017.06.013
