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Cited by 170

The DOI matches its Crossref record; 3 of the 3 references it cites were found in a registry or an index.

Sub-100 nm Channel Length Graphene Transistors

Open access
Liao, Lei, Bai, Jingwei, Cheng, Rui, Lin, Yung-Chen, Jiang, Shan, Qu, Yongquan, Huang, Yu, Duan, Xiangfeng·2010·Nano Letters

Abstract

Here we report high-performance sub-100 nm channel length graphene transistors fabricated using a self-aligned approach. The graphene transistors are fabricated using a highly doped GaN nanowire as the local gate with the source and drain electrodes defined through a self-aligned process and the channel length defined by the nanowire size. This fabrication approach allows the preservation of the high carrier mobility in graphene and ensures nearly perfect alignment between source, drain, and gate electrodes. It therefore affords transistor performance not previously possible. Graphene transistors with 45-100 nm channel lengths have been fabricated with the scaled transconductance exceeding 2 mS/μm, comparable to the best performed high electron mobility transistors with similar channel lengths. Analysis of and the device characteristics gives a transit time of 120-220 fs and the projected intrinsic cutoff frequency (f(T)) reaching 700-1400 GHz. This study demonstrates the exciting potential of graphene based electronics in terahertz electronics.

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Metadata

Authors
Liao, L., Bai, J., Cheng, R., Lin, Y.-C., Jiang, S., Qu, Y., Huang, Y., & Duan, X.
Venue
Nano Letters
Published
2010-09-03
Volume
10
Issue
10
Pages
3952-3956
ISSN
  • 1530-6984 (ISSN-L)
  • 1530-6992
OpenAlex
W2157549755
Cited by
170
References
3
FWCI
8.80
Type
journal article
Language
en
Open access
green

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CoChat. (2026). Citation check: Sub-100 nm Channel Length Graphene Transistors. https://app.cochat.ai/papers/10.1021/nl101724k
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Liao, L., Bai, J., Cheng, R., Lin, Y.-C., Jiang, S., Qu, Y., Huang, Y., & Duan, X. (2010). Sub-100 nm Channel Length Graphene Transistors. Nano Letters. https://doi.org/10.1021/nl101724k

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