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Layer-by-layer assembled charge-trap memory devices with adjustable electronic properties
Abstract
We describe a versatile approach for preparing flash memory devices composed of polyelectrolyte/gold nanoparticle multilayer films. Anionic gold nanoparticles were used as the charge storage elements, and poly(allylamine)/poly(styrenesulfonate) multilayers deposited onto hafnium oxide (HfO2)-coated silicon substrates formed the insulating layers. The top contact was formed by depositing HfO2 and platinum. In this study, we investigated the effect of increasing the number of polyelectrolyte and gold nanoparticle layers on memory performance, including the size of the memory window (the critical voltage difference between the 'programmed' and 'erased' states of the devices) and programming speed. We observed a maximum memory window of about 1.8 V, with a stored electron density of 4.2 x 1012 cm-2 in the gold nanoparticle layers, when the devices consist of three polyelectrolyte/gold nanoparticle layers. The reported approach offers new opportunities to prepare nanostructured polyelectrolyte/gold nanoparticle-based memory devices with tailored performance.
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The charge trap memristor mechanism is identical to charge-trap flash memory, in which reversible charge trapping and de-trapping to the charge trap layer alter the threshold voltage of the transistor.
“The CTM mechanism is identical to the charge‐trap flash (CTF) memory, in which reversible charge trapping and de‐trapping to the charge trap layer alter the threshold voltage of the transistor.[ 14 , 15 , 16 ]”
From Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy-Efficient Neuromorphic Hardware (2023) · cites this paper as [15]
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Kim, G., Son, S., Song, H., Jeon, J. B., Lee, J., Cheong, W. H., Choi, S., & Kim, K. M. (2023) · Advanced Science · doi:10.1002/advs.202205654 · Cited by 72
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Metadata
- Authors
- Lee, J.-S., Cho, J., Lee, C., Kim, I., Park, J., Kim, Y.-M., Shin, H., Lee, J., & Caruso, F.
- Affiliations
- Kookmin University (KR)
- The University of Melbourne (AU)
- Corresponding author
- Lee, Jang-Sik
- Cho, Jinhan
- Venue
- Nature Nanotechnology
- Published
- 2007-12
- Volume
- 2
- Issue
- 12
- Pages
- 790-795
- ISSN
- 1748-3387 (ISSN-L)
- 1748-3395
- OpenAlex
- W2059253033
- Cited by
- 265
- References
- 0
- Citations by year
- 2026: 1 · 2025: 3 · 2024: 4 · 2023: 7 · 2022: 2 · 2021: 7 · 2020: 14 · 2019: 16 · 2018: 24 · 2017: 14 · 2016: 12 · 2015: 20 · 2014: 13 · 2013: 23 · 2012: 25
- FWCI
- 18.58
- Type
- journal article
- Language
- en
- Open access
- closed
- Licence
- www.springer.com/tdm (tdm)
- Locations
- Nature Nanotechnology (publishedVersion)
- PubMed (publishedVersion)
- Funders
- Australian Research Council
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Semiconductor materials and devices
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Keywords
- charge trap flash memory, polyelectrolyte multilayers, gold nanoparticles, polyallylamine, polystyrene sulfonate, hafnium oxide, memory window, programming speed, layer-by-layer assembly
- MeSH terms
- Crystallization, Electronics, Equipment Design, Gold, Ions, Signal Processing, Computer-Assisted, Information Storage and Retrieval, Equipment Failure Analysis, Nanotechnology, Nanostructures
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