The DOI matches its Crossref record; 1 of the 1 references it cites were found in a registry or an index.
Chip cooling with integrated carbon nanotube microfin architectures
Open accessAbstract
Efficient cooling of silicon chips using microfin structures made of aligned multiwalled carbon nanotube arrays is achieved. The tiny cooling elements mounted on the back side of the chips enable power dissipation from the heated chips on the level of modern electronics demands. The nanotube fins are mechanically superior compared to other materials being ten times lighter, flexible, and stiff at the same time. These properties accompanied with the relative simplicity of the fabrication makes the nanotube structures strong candidates for future on-chip thermal management applications.
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Citations
Cites
Thermal Transport Measurements of Individual Multiwalled Nanotubes
Kim, P., Shi, L., Majumdar, A., & McEuen, P. L. (2001) · Physical Review Letters · doi:10.1103/physrevlett.87.215502 · Cited by 3,378
Cited by
Carbon Nanotube Mass Production: Principles and Processes
Zhang, Q., Huang, J., Zhao, M., Qian, W., & Wei, F. (2011) · ChemSusChem · doi:10.1002/cssc.201100177 · Cited by 389
Metadata
- Authors
- Kordás, K., Tóth, G., Moilanen, P., Kumpumäki, M., Vähäkangas, J., Uusimäki, A., Vajtai, R., & Ajayan, P. M.
- Venue
- Applied Physics Letters
- Publisher
- AIP Publishing
- Published
- 2007-03-19
- Volume
- 90
- Issue
- 12
- ISSN
- 0003-6951 (ISSN-L)
- 1077-3118
- OpenAlex
- W2005170861
- Cited by
- 256
- References
- 1
- FWCI
- 45.27
- Type
- journal article
- Language
- en
- Open access
- hybrid
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- Kordás, K., Tóth, G., Moilanen, P., Kumpumäki, M., Vähäkangas, J., Uusimäki, A., Vajtai, R., & Ajayan, P. M. (2007). Chip cooling with integrated carbon nanotube microfin architectures. Applied Physics Letters. https://doi.org/10.1063/1.2714281
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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