A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications
Abstract
SH ISA patents were filed in 1991 by Hitachi, and expired in 2014. Thereafter the ISA belonged to the public domain. We developed a 2-stage pipeline SH-2 CPU core, which expends only 4,655 logic cells of Intel MAX 10 FPGA fabricated on 55nm embedded NOR flash technology, 33KG of 40nm NVM process at 240MHz, and 20KG of 0.18um process at 80MHz. We bifurcated the RTL to (1) SoC integration, and (2) small FPGA, each optimized for the respective technology. The MCU which incorporates the CPU supports AHB, APB, UART, CAN-FD, PWM, and ADC. We plan to move this solution to IoT, edge AI and robotic applications. GNU and other compilers, assemblers, simulators, debuggers support the CPU.
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The NVIDIA Jetson series is a promising AI SoC characterized by high energy efficiency, small size, and high throughput.
“What's more, it is worth mentioning that the NVIDIA Jetson series is a promising AI SoC [37]. It is characterized by high energy efficiency, small size, and high throughput.”
From Edge YOLO: Real-Time Intelligent Object Detection System Based on Edge-Cloud Cooperation in Autonomous Vehicles (2022) · cites this paper as [37]
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References 1 · Cited by 8
- Authors
- Hagiwara, K., Hayashi, T., Kawasaki, S., Arakawa, F., Endo, O., Nomura, H., Tsukamoto, A., Nguyen, D., Nguyen, B., Tran, A., Hyunh, H., Kudoh, I., & Pham, C.-K.
- Affiliations
- University of Electro-Communications (JP)
- Nagoya University (JP)
- The University of Tokyo (JP)
- Venue
- 2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
- Publisher
- IEEE
- Published
- 2018-04
- OpenAlex
- W2807235401
- Cited by
- 8
- References
- 1
- Citations by year
- 2024: 1 · 2023: 1 · 2022: 3 · 2021: 1 · 2019: 2
- FWCI
- 0.64
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) (publishedVersion, public-domain)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Embedded Systems and FPGA Applications
- Physical Sciences › Engineering › Control and Systems Engineering › Embedded Systems and FPGA Design
- Keywords
- two-stage pipeline, FPGA implementation, system-on-chip, low-power microcontroller, IoT applications, edge AI, robotics, CAN FD
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