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Cited by 255

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A 180mV FFT processor using subthreshold circuit techniques

Wang, A., Chandrakasan, A.·2004·2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

Abstract

Minimizing energy requires scaling supply voltages below device thresholds. Logic and memory design techniques allowing subthreshold operation are developed and demonstrated. The fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18/spl mu/m CMOS logic process while using 155nJ/FFT at the optimal operating point.

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Metadata

Authors
Wang, A., & Chandrakasan, A.
Venue
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)
Publisher
IEEE
Published
2004-09-28
Pages
292-529
ISSN
0193-6530 (ISSN-L)
OpenAlex
W1491082069
Cited by
255
References
0
FWCI
19.05
Type
conference paper
Language
en
Open access
closed

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CoChat. (2026). Citation check: A 180mV FFT processor using subthreshold circuit techniques. https://app.cochat.ai/papers/10.1109/isscc.2004.1332709
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Wang, A., & Chandrakasan, A. (2004). A 180mV FFT processor using subthreshold circuit techniques. 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519). https://doi.org/10.1109/isscc.2004.1332709

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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.