A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors

Khwa, Win-San, Chen, Jia-Jing, Li, Jia-Fang · 2018 IEEE International Solid - State Circuits Conference - (ISSCC) · 2018