A Robust Chaos-Based True Random Number Generator Embedded in Reconfigurable Switched-Capacitor Hardware
Open accessAbstract
This paper presents a new chaos-based True Random Number Generator (TRNG) with decreased voltage supply sensitivity. Contrary to the traditionally used sources of randomness it uses well-defined deterministic switched-capacitor circuit that exhibits chaos. The whole design is embedded into commercially available mixed-signal PSoC reconfigurable device without any external components. Proposed design is optimized for reduction of influence of supply voltage to the quality of generated random bit stream. The influence of circuit non-idealities is significantly reduced by the proposed XOR corrector and optimized circuit topology. The ultimate output bit rate of proposed TRNG is 60 kbit/s and quality of generated bit-streams is confirmed by passing standard FIPS and correlation statistical tests performed in the full range of PSoC device supply voltages.
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Chaos is a perfect entropy source for fast TRNGs due to high bandwidth, unpredictability, and insensitivity to disturbance and component tolerances.
“Due to its high bandwidth, unpredictability and insensitive to various disturbance and tolerances of components, chaos is a perfect entropy source for fast TRNGs [14], [76], [77].”
From True Random Number Generators Using Electrical Noise (2019) · cites this paper as [77]
The Introduction (page unavailable) describes chaotic circuits as an efficient TRNG alternative and explains why their output can be unpredictable. The Conclusions (page unavailable) report up to 60 kbit/s for this design, but do not establish high bandwidth as a general property of chaos. Sections 5 and 5.1 report that circuit nonidealities cause redundancy and detectable correlations; the paper credits design optimization and postprocessing, not inherent insensitivity to disturbances or component tolerances, for reducing their effects. (LLM, conf=0.88)
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References 14 · Cited by 77
Research works printed but not linked: 4
- PSoC Mixed Signal Array Final Data Sheet, Document No. 38- 12012 Rev.C, August 28, 2003, pp.1-332, available at: http://www.cypressmicro.com.
- ESS, D. V. Understanding switched capacitor analog blocks. Cypress Microsystems Application Note AN2041, 2002, pp.1-16.
- DRUTAROVSKY, M., GALAJDA, P. Chaos-based True Random Number Generator embedded in a reconfigurable hardware. Journal of Electrical Engineering, 2006, vol. 57, no.4, pp.218-225.
- DAVIES, R. B. Exclusive OR (XOR) and hardware random number generators. February 28, 2002, pp.1-11, available at: http://www.robertnz.net/pdf/xor2.pdf.
- Authors
- Drutarovsky, M., & Galajda, P.
- Affiliations
- Technical University of Košice (SK)
- ORCID
- Galajda, Pavol
- Venue
- 2007 17th International Conference Radioelektronika
- Publisher
- IEEE
- Published
- 2007-04
- Pages
- 1-6
- OpenAlex
- W2136473487
- Cited by
- 77
- References
- 14
- Citations by year
- 2026: 1 · 2025: 2 · 2024: 5 · 2023: 4 · 2022: 3 · 2021: 5 · 2020: 5 · 2019: 9 · 2018: 7 · 2017: 4 · 2016: 4 · 2015: 5 · 2014: 5 · 2013: 4 · 2012: 1
- FWCI
- 2.32
- Type
- conference paper
- Language
- en
- Open access
- green
- hdl.handle.net
- Licence
- cc-by
- Locations
- International Conference Radioelektronika (publishedVersion)
- Brno University of Technology Digital Library (Brno University of Technology) (submittedVersion, cc-by)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Chaos-based Image/Signal Encryption
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Keywords
- true random number generator, switched-capacitor circuits, reconfigurable hardware, supply voltage sensitivity, circuit non-idealities
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