The DOI matches its Crossref record; 3 of the 3 references it cites were found in a registry or an index.
A Survey of Automated Techniques for Formal Software Verification
Abstract
The quality and the correctness of software are often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a design is free of specific flaws. This paper surveys algorithms that perform automatic static analysis of software to detect programming errors or prove their absence. The three techniques considered are static analysis with abstract domains, model checking, and bounded model checking. A short tutorial on these techniques is provided, highlighting their differences when applied to practical problems. This paper also surveys tools implementing these techniques and describes their merits and shortcomings.
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Citations
Cites
Bellman, R. E. (2010) · doi:10.1515/9781400835386 · Cited by 14,588
Cousot, P., & Cousot, R. (1977) · Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages - POPL '77 · doi:10.1145/512950.512973 · Cited by 6,279
Blanchet, B., Cousot, P., Cousot, R., Feret, J., Mauborgne, L., Miné, A., Monniaux, D., & Rival, X. (2002) · Lecture Notes in Computer Science · doi:10.1007/3-540-36377-7_5 · Cited by 202
Metadata
- Authors
- D'Silva, V., Kroening, D., & Weissenbacher, G.
- Venue
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Published
- 2008-07
- Volume
- 27
- Issue
- 7
- Pages
- 1165-1178
- ISSN
- 0278-0070 (ISSN-L)
- OpenAlex
- W2031525781
- Cited by
- 378
- References
- 3
- FWCI
- 21.77
- Type
- journal article
- Language
- en
- Open access
- closed
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- D'Silva, V., Kroening, D., & Weissenbacher, G. (2008). A Survey of Automated Techniques for Formal Software Verification. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. https://doi.org/10.1109/tcad.2008.923410
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