Cited by 33Advanced Neural Network ApplicationsLow-power high-performance VLSI designParallel Computing and Optimization Techniques

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DTATrans: Leveraging Dynamic Token-Based Quantization With Accuracy Compensation Mechanism for Efficient Transformer Architecture

Yang, Tao, Ma, Fei, Li, Xiaoling, Liu, Fangxin, Zhao, Yilong, He, Zhezhi, Jiang, Li·2023·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Abstract

Models based on the attention mechanism, i.e., transformers, have shown extraordinary performance in natural language processing (NLP) tasks. However, their memory footprint, inference latency, and power consumption are still prohibitive for efficient inference at edge devices, even at data centers. To tackle this issue, we present an algorithm-architecture co-design named DTATrans. We find empirically that the tolerance to the noise varies from token to token in attention-based NLP models. This finding leads us to dynamically quantize different tokens with mixed levels of bits. Furthermore, we find that the overstrict quantization method causes a dilemma of the model accuracy and model compression ratio, which impels us to explore a method to compensate for the model accuracy when the compression ratio is high. Thus, in DTATrans, we design a compression framework that: 1) dynamically quantizes tokens while they are forwarded in the models; 2) jointly determines the ratio of each precision; and 3) compensate the model accuracy by exploiting lightweight computing on the 0-bit tokens. Moreover, due to the dynamic mixed-precision tokens caused by our framework, previous matrix-multiplication accelerators (e.g., systolic array) cannot effectively exploit the benefit of the compressed attention computation. We thus design our transformer accelerator with the variable-speed systolic array (VSSA) and propose an effective optimization strategy to alleviate the pipeline-stall problem in VSSA without hardware overhead. We conduct experiments with existing attention-based NLP models, including BERT and GPT-2 on various language tasks. Our results show that DTATrans outperforms the previous neural network accelerator Eyeriss by$16.04\times $in terms of speedup and$3.62\times $in terms of energy saving. Compared with the state-of-the-art attention accelerator SpAtten, our DTATrans achieves at least$3.62\times $speedup and$4.22\times $energy efficiency improvement.

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Crossref · 10.1109/tcad.2022.3181541

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Research works printed but not linked: 31

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Metadata

Authors
Yang, T., Ma, F., Li, X., Liu, F., Zhao, Y., He, Z., & Jiang, L.
Affiliations
  • Shanghai Jiao Tong University (CN)
  • Inceptio Technology Institute, Shanghai, China
Venue
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2023-02
Volume
42
Issue
2
Pages
509-520
ISSN
  • 0278-0070 (ISSN-L)
  • 1937-4151
OpenAlex
W4285236966
Cited by
33
References
4
Citations by year
2026: 8 · 2025: 16 · 2024: 6 · 2023: 3
FWCI
2.04
Type
journal article
Language
en
Open access
closed
Locations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (publishedVersion)
Funders
  • National Key Research and Development Program of China (2018YFB1403400)
  • National Natural Science Foundation of China (61834006)
  • Wu Wen Jun Honorary Doctoral Scholarship, AI Institute, Shanghai Jiao Tong University
Topics
  • Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
  • Physical Sciences › Computer Science › Hardware and Architecture › Parallel Computing and Optimization Techniques
Keywords
mixed-precision quantization, attention mechanism, transformer models, neural network compression, transformer accelerators, energy-efficient inference, BERT, GPT-2

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