The DOI matches its Crossref record.
An asymmetric distributed shared memory model for heterogeneous parallel systems
Abstract
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existing programming models for heterogeneous computing rely on programmers to explicitly manage data transfers between the CPU system memory and accelerator memory. This paper presents a new programming model for heterogeneous computing, called Asymmetric Distributed Shared Memory (ADSM), that maintains a shared logical memory space for CPUs to access objects in the accelerator physical memory but not vice versa. The asymmetry allows light-weight implementations that avoid common pitfalls of symmetrical distributed shared memory systems. ADSM allows programmers to assign data objects to performance critical methods. When a method is selected for accelerator execution, its associated data objects are allocated within the shared logical memory space, which is hosted in the accelerator physical memory and transparently accessible by the methods executed on CPUs. We argue that ADSM reduces programming efforts for heterogeneous computing systems and enhances application portability. We present a software implementation of ADSM, called GMAC, on top of CUDA in a GNU/Linux environment. We show that applications written in ADSM and running on top of GMAC achieve performance comparable to their counterparts using programmer-managed data transfers. This paper presents the GMAC system and evaluates different design choices. We further suggest additional architectural support that will likely allow GMAC to achieve higher application performance than the current CUDA model.
Overview
Integrity signals
Registry
Cites
Statistics
Verification
Claims the paper makes
Claims other papers make about this one
Each is checked against this paper’s own text: does it say what the citing paper says it does?
HCTs can address inefficiencies of over-provisioning and underutilization by intelligently managing resources of both PUs.
“HCTs can address these inefficiencies by intelligently managing the resources of both PUs [Gelado et al. 2010;Hu et al. 2011].”
From A Survey of CPU-GPU Heterogeneous Computing Techniques (2015) · cites this paper as Gelado et al. 2010
Citations
Cites
No references could be resolved yet.
Research works printed but not linked: 44
- 10.1145/223982.223985 · DOI
- 10.1109/MC.1986.1663305 · DOI
- 10.1007/3-540-35767-X_13 · DOI
- 10.1109/ICCL.1988.13046 · DOI
- 10.5555/1413370.1413372 · DOI
- 10.1145/1188455.1188546 · DOI
- 10.1109/CMPCON.1993.289730 · DOI
- 10.1109/12.2245 · DOI
- 10.1145/325096.325121 · DOI
- 10.1145/1281500.1281647 · DOI
- 10.1145/121132.121159 · DOI
- 10.1145/349299.349311 · DOI
- J. Darlington , A. J. Field , P. G. Harrison , P. H. J. Kelly , D. W. N. Sharp , and Q. Wu . Parallel programming using skeleton functions . In PARLE'93 , pages 146 -- 160 , London, UK , 1993 . Springer-Verlag . J. Darlington, A. J. Field, P. G. Harrison, P. H. J. Kelly, D. W. N.Sharp, and Q. Wu. Parallel programming using skeleton functions. In PARLE'93, pages 146--160, London, UK, 1993. Springer-Verlag.
- 10.1109/2.116849 · DOI
- 10.1145/52324.52342 · DOI
- 10.1145/74850.74871 · DOI
- 10.1109/CMPCON.1993.289682 · DOI
- 10.1145/1375527.1375571 · DOI
- 10.1109/40.124376 · DOI
- 10.1109/TVLSI.2003.821545 · DOI
- 10.5555/549928.795741 · DOI
- 10.1145/195473.195569 · DOI
- W. W. Hwu and J. Stone . A programmers view of the new GPUcomputing capabilities in the Fermi architecture and cuda 3.0. White paper , University of Illinois , 2009 . W. W. Hwu and J. Stone. A programmers view of the new GPUcomputing capabilities in the Fermi architecture and cuda 3.0. White paper, University of Illinois, 2009.
- IBM Staff . SPE Runtime Management Library , 2007 . IBM Staff. SPE Runtime Management Library, 2007.
- Intel Staff . Intel 945G Express Chipset Product Brief , 2005 . Intel Staff. Intel 945G Express Chipset Product Brief, 2005.
- 10.1007/978-3-540-92990-1_4 · DOI
- 10.1147/rd.494.0589 · DOI
- P. Keleher , A. L. Cox , S. Dwarkadas , and W. Zwaenepoel . Tread-marks: distributed shared memory on standard workstations and operating systems . In WTEC'94 , pages 10 -- 10 , Berkeley, CA, USA , 1994 .USENIX Association. P. Keleher, A. L. Cox, S. Dwarkadas, and W. Zwaenepoel. Tread-marks: distributed shared memory on standard workstations and operating systems. In WTEC'94, pages 10--10, Berkeley, CA, USA, 1994.USENIX Association.
- 10.1145/1555754.1555774 · DOI
- 10.1145/325164.325132 · DOI
- 10.1145/75104.75105 · DOI
- 10.1109/MM.2008.31 · DOI
- C. Maples and L. Wittie . Merlin: A superglue for multicomputersystems . In Compcon Spring '90 , volume 90 , pages 73 -- 81 , 1990 . C. Maples and L. Wittie. Merlin: A superglue for multicomputersystems. In Compcon Spring '90, volume 90, pages 73--81, 1990.
- 10.5555/602770.602833 · DOI
- NVIDIA Staff . NVIDIA CUDA Programming Guide 2.2 , 2009 . NVIDIA Staff. NVIDIA CUDA Programming Guide 2.2, 2009.
- 10.1109/MM.2008.50 · DOI
- 10.1145/1360612.1360617 · DOI
- 10.1109/12.859540 · DOI
- 10.1016/S0167-8191(02)00188-6 · DOI
- 10.1109/TC.2004.104 · DOI
- D. Warren and S. Haridi . Data Diffusion Machine -- a scalable sharedvirtual memory multiprocessor. In Fifth Generation Computer Systems 1988, page 943 . Springer-Verlag , 1988 . D. Warren and S. Haridi. Data Diffusion Machine -- a scalable sharedvirtual memory multiprocessor. In Fifth Generation Computer Systems 1988, page 943. Springer-Verlag, 1988.
- J. Wilson , A.W., J. LaRowe , R.P. , and M. Teller . Hardware assist fordistributed shared memory . In DCS '03 , pages 246 -- 255 , May 1993 . J. Wilson, A.W., J. LaRowe, R.P., and M. Teller. Hardware assist fordistributed shared memory. In DCS '03, pages 246--255, May 1993.
- Xilinx Staff . Virtex-5 Family Overview , Feb 2009 . Xilinx Staff. Virtex-5 Family Overview, Feb 2009.
- 10.1109/ICDCS.1990.89329 · DOI
Cited by
Sorted by citations
A Survey of CPU-GPU Heterogeneous Computing Techniques
Mittal, S., & Vetter, J. S. (2015) · ACM Computing Surveys · doi:10.1145/2788396 · Cited by 568
Metadata
- Authors
- Gelado, I., Stone, J. E., Cabezas, J., Patel, S., Navarro, N., & Hwu, W.-M. W.
- Affiliations
- Universitat Politecnica de Catalunya, Barcelona, Spain
- University of Illinois, Urbana-Champaign, IL, USA
- Venue
- ACM SIGARCH Computer Architecture News
- Published
- 2010-03-05
- Volume
- 38
- Issue
- 1
- Pages
- 347-358
- ISSN
- 0163-5964
- Cited by
- 25
- References
- 0
- Language
- en
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review