The DOI matches its Crossref record; 2 of the 2 references it cites were found in a registry or an index.
Polyhedral parallel code generation for CUDA
Open accessAbstract
This article addresses the compilation of a sequential program for parallel execution on a modern GPU. To this end, we present a novel source-to-source compiler called PPCG. PPCG singles out for its ability to accelerate computations from any static control loop nest, generating multiple CUDA kernels when necessary. We introduce a multilevel tiling strategy and a code generation scheme for the parallelization and locality optimization of imperfectly nested loops, managing memory and exposing concurrency according to the constraints of modern GPUs. We evaluate our algorithms and tool on the entire PolyBench suite.
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Citations
Cites
Code generation in the polyhedral model is easier than you think
Bastoul, C. (2004) · Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004. · doi:10.1109/pact.2004.1342537 · Cited by 447
A practical automatic polyhedral parallelizer and locality optimizer
Bondhugula, U., Hartono, A., Ramanujam, J., & Sadayappan, P. (2008) · ACM SIGPLAN Notices · doi:10.1145/1379022.1375595 · Cited by 248
Metadata
- Authors
- Verdoolaege, S., Carlos Juega, J., Cohen, A., Ignacio Gómez, J., Tenllado, C., & Catthoor, F.
- Venue
- ACM Transactions on Architecture and Code Optimization
- Published
- 2013-01
- Volume
- 9
- Issue
- 4
- Pages
- 1-23
- ISSN
- 1544-3566 (ISSN-L)
- 1544-3973
- OpenAlex
- W2077143534
- Cited by
- 382
- References
- 2
- FWCI
- 63.45
- Type
- journal article
- Language
- en
- Open access
- bronze
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- Verdoolaege, S., Carlos Juega, J., Cohen, A., Ignacio Gómez, J., Tenllado, C., & Catthoor, F. (2013). Polyhedral parallel code generation for CUDA. ACM Transactions on Architecture and Code Optimization. https://doi.org/10.1145/2400682.2400713
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