Cited by 139Advanced Neural Network ApplicationsEmbedded Systems Design TechniquesEmbedded Systems and FPGA Applications

A Lightweight YOLOv2: A Binarized CNN with A Parallel Support Vector Regression for an FPGA

Nakahara, Hiroki, Yonekawa, Haruyoshi, Fujii, Tomoya, Sato, Shimpei·2018·Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

Abstract

A frame object detection problem consists of two problems: one is a regression problem to spatially separated bounding boxes, the second is the associated classification of the objects within realtime frame rate. It is widely used in the embedded systems, such as robotics, autonomous driving, security, and drones - all of which require high-performance and low-power consumption. This paper implements the YOLO (You only look once) object detector on an FPGA, which is faster and has a higher accuracy. It is based on the convolutional deep neural network (CNN), and it is a dominant part both the performance and the area. However, the object detector based on the CNN consists of a bounding box prediction (regression) and a class estimation (classification). Thus, the conventional all binarized CNN fails to recognize in most cases. In the paper, we propose a lightweight YOLOv2, which consists of the binarized CNN for a feature extraction and the parallel support vector regression (SVR) for both a classification and a localization. To our knowledge, this is the first time binarized CNN»s have been successfully used in object detection. We implement a pipelined based architecture for the lightweight YOLOv2 on the Xilinx Inc. zcu102 board, which has the Xilinx Inc. Zynq Ultrascale+ MPSoC. The implemented object detector archived 40.81 frames per second (FPS). Compared with the ARM Cortex-A57, it was 177.4 times faster, it dissipated 1.1 times more power, and its performance per power efficiency was 158.9 times better. Also, compared with the nVidia Pascall embedded GPU, it was 27.5 times faster, it dissipated 1.5 times lower power, and its performance per power efficiency was 42.9 times better. Thus, our method is suitable for the frame object detector for an embedded vision system.

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Crossref · 10.1145/3174243.3174266

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  • Another novel FPGA accelerator design for real-time application with ultralow power CNNuses Intel Arria 10 FPGA.

    “Another novel FPGA accelerator design for real-time application with ultralow power CNNuses Intel Arria 10 FPGA.”
  • FPGA is able to achieve 3.3 times more power efficiency than Titan X GPU, whereas it has 418 times more power efficiency than CPU.

    “The overall result shows that FPGA is able to achieve 3.3 times more power efficiency than Titan X GPU, whereas it has 418 times more power efficiency than CPU.”
  • With this implementation, Arria 10 is able to save 20% of power, thus making it suitable to use in EI related applications such as road object recognition.

    “With this implementation, Arria 10 is able to save 20% of power, thus making it suitable to use in EI related applications such as road object recognition.”
  • Titan X GPU is a reference platform for comparison and the framework is YOLO V2.

    “Titan X GPU is a reference platform for comparison and the framework is YOLO V2 [84].”

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References 32 · Cited by 139

Authors
Nakahara, H., Yonekawa, H., Fujii, T., & Sato, S.
Affiliations
Tokyo Institute of Technology (JP)
Venue
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Publisher
ACM
Published
2018-02-15
Pages
31-40
OpenAlex
W2790167166
Cited by
139
References
32
Citations by year
2026: 6 · 2025: 8 · 2024: 7 · 2023: 17 · 2022: 21 · 2021: 23 · 2020: 33 · 2019: 14 · 2018: 10
FWCI
6.03
Type
conference paper
Language
en
Open access
closed
Locations
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA) (publishedVersion)
Funders
  • Nvidia
  • Japan Society for the Promotion of Science
Topics
  • Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
  • Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Embedded Systems and FPGA Applications
Keywords
YOLOv2, object detection, FPGA implementation, support vector regression, lightweight neural networks, embedded vision, performance per watt, bounding box regression, real-time inference

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