Cited by 14Parallel Computing and Optimization TechniquesAdvanced Neural Network ApplicationsEmbedded Systems Design Techniques

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E-BATCH: Energy-Efficient and High-Throughput RNN Batching

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Silfa, Franyell, Arnau, Jose Maria, González, Antonio·2022·ACM Transactions on Architecture and Code Optimization

Abstract

Recurrent Neural Network (RNN) inference exhibits low hardware utilization due to the strict data dependencies across time-steps. Batching multiple requests can increase throughput. However, RNN batching requires a large amount of padding since the batched input sequences may vastly differ in length. Schemes that dynamically update the batch every few time-steps avoid padding. However, they require executing different RNN layers in a short time span, decreasing energy efficiency. Hence, we propose E-BATCH, a low-latency and energy-efficient batching scheme tailored to RNN accelerators. It consists of a runtime system and effective hardware support. The runtime concatenates multiple sequences to create large batches, resulting in substantial energy savings. Furthermore, the accelerator notifies it when the evaluation of an input sequence is done. Hence, a new input sequence can be immediately added to a batch, thus largely reducing the amount of padding. E-BATCH dynamically controls the number of time-steps evaluated per batch to achieve the best trade-off between latency and energy efficiency for the given hardware platform. We evaluate E-BATCH on top of E-PUR and TPU. E-BATCH improves throughput by 1.8× and energy efficiency by 3.6× in E-PUR, whereas in TPU, it improves throughput by 2.1× and energy efficiency by 1.6×, over the state-of-the-art.

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Metadata

Authors
Silfa, F., Arnau, J. M., & González, A.
Affiliations
  • Universitat Politècnica de Catalunya (ES)
  • Universitat Politècnica de Catalunya, Barcelona, Spain
Venue
ACM Transactions on Architecture and Code Optimization
Published
2022-01-23
Volume
19
Issue
1
Pages
1-23
ISSN
  • 1544-3566 (ISSN-L)
  • 1544-3973
OpenAlex
W3089019106
Cited by
14
References
2
Citations by year
2026: 1 · 2025: 5 · 2024: 1 · 2023: 2 · 2022: 3
FWCI
2.00
Type
journal article
Language
en
Open access
Locations
  • ACM Transactions on Architecture and Code Optimization (publishedVersion)
  • arXiv (Cornell University) (submittedVersion)
  • UPCommons institutional repository (Universitat Politècnica de Catalunya) (submittedVersion, public-domain)
  • arXiv (Cornell University)
Funders
  • CoCoUnit ERC Advanced Grant of the EU’s Horizon 2020 (833057)
  • Spanish State Research Agency (PID2020-113172RB-I00)
  • ICREA Academia program
Topics
  • Physical Sciences › Computer Science › Hardware and Architecture › Parallel Computing and Optimization Techniques
  • Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
  • Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
Keywords
energy efficiency, sequence concatenation, runtime systems, throughput, energy-delay tradeoff, TPU

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