Hosokawa, K.

An analog-AI chip for energy-efficient speech recognition and transcription

Ambrogio, S., Narayanan, P., Okazaki, A., Fasoli, A., Mackin, C., Hosokawa, K., Nomura, A., Yasuda, T., Chen, A., Friz, A., et al. (2023) · Nature

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 269

Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format

Narayanan, P., Ambrogio, S., Okazaki, A., Hosokawa, K., Tsai, H., Nomura, A., Yasuda, T., Mackin, C., Lewis, S. C., Friz, A., et al. (2021) · IEEE Transactions on Electron Devices

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 85

A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh

Jain, S., Tsai, H., Chen, C.-T., Muralidhar, R., Boybat, I., Frank, M. M., Woźniak, S., Stanisavljevic, M., Adusumilli, P., Narayanan, P., et al. (2023) · IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Advanced Memory and Neural ComputingParallel Computing and Optimization Techniques

Cited by 76

AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed

Chang, H.-Y., Narayanan, P., Lewis, S. C., Farinha, N. C. P., Hosokawa, K., Mackin, C., Tsai, H., Ambrogio, S., Chen, A., & Burr, G. W. (2019) · IBM Journal of Research and Development

Advanced Memory and Neural ComputingAnalog and Mixed-Signal Circuit Design

Cited by 62

On-Chip Trainable 1.4M 6T2R PCM Synaptic Array with 1.6K Stochastic LIF Neurons for Spiking RBM

Ishii, M., Shin, U., Hosokawa, K., BrightSky, M., Haensch, W., Kim, S., Lewis, S., Okazaki, A., Okazawa, J., Ito, M., et al. (2019) · 2019 IEEE International Electron Devices Meeting (IEDM)

Advanced Memory and Neural ComputingAnalog and Mixed-Signal Circuit Design

Cited by 43