AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed
Abstract
In this article, we present innovative microarchitectural designs for multilayer deep neural networks (DNNs) implemented in crossbar arrays of analog memories. Data is transferred in a fully parallel manner between arrays without explicit analog-to-digital converters. Design ideas including source follower-based readout, array segmentation, and transmit-by-duration are adopted to improve the circuit efficiency. The execution energy and throughput, for both DNN training and inference, are analyzed quantitatively using circuit simulations of a full CMOS design in the 90-nm technology node. We find that our current design could achieve up to 12–14 TOPs/s/W energy efficiency for training, while a projected scaled design could achieve up to 250 TOPs/s/W. Key challenges in realizing analog AI systems are discussed.
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Analog in-memory computing computes matrix-vector multiplications only approximately, due to nonidealities that are often non-deterministic or nonlinear.
“Analog in-memory computing—a promising approach for energy-efficient acceleration of deep learning workloads—computes matrix-vector multiplications but only approximately, due to nonidealities that often are non-deterministic or nonlinear.”
From Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators (2023) · cites this paper as [17]
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Brain-inspired computing needs a master plan
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“Finally, the LC decided which direction (north, south, west or east) to send the generated durations, configuring the south 2D routing circuits 4,33 .”
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Nonideality‐Aware Training for Accurate and Robust Low‐Power Memristive Neural Networks
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- Authors
- Chang, H.-Y., Narayanan, P., Lewis, S. C., Farinha, N. C. P., Hosokawa, K., Mackin, C., Tsai, H., Ambrogio, S., Chen, A., & Burr, G. W.
- Venue
- IBM Journal of Research and Development
- Publisher
- IBM
- Published
- 2019-11-01
- Volume
- 63
- Issue
- 6
- Pages
- 8:1-8:14
- ISSN
- 0018-8646 (ISSN-L)
- OpenAlex
- W2968365336
- Cited by
- 62
- References
- 8
- Citations by year
- 2026: 1 · 2025: 6 · 2024: 10 · 2023: 13 · 2022: 14 · 2021: 7 · 2020: 11
- FWCI
- 2.88
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IBM Journal of Research and Development (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- analog memory, crossbar arrays, deep neural network, neuromorphic hardware, microarchitecture, energy efficiency, 90 nm technology, parallel data transfer
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