Das, Reetuparna

A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing

Wang, J., Wang, X., Eckert, C., Subramaniyan, A., Das, R., Blaauw, D., & Sylvester, D. (2020) · IEEE Journal of Solid-State Circuits

Low-power high-performance VLSI designAdvanced Memory and Neural Computing

Cited by 244

In-Memory Data Parallel Processor

Fujiki, D., Mahlke, S., & Das, R. (2018) · Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems

Parallel Computing and Optimization TechniquesAdvanced Memory and Neural Computing

Cited by 109