Yoo, J.

Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET

Loubet, N., Hook, T., Montanini, P., Yeung, C.-W., Kanakasabapathy, S., Guillom, M., Yamashita, T., Zhang, J., Miao, X., Wang, J., et al. (2017) · 2017 Symposium on VLSI Technology

Advancements in Semiconductor Devices and Circuit Design2D Materials and Applications

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3nm GAA Technology featuring Multi-Bridge-Channel FET for Low Power and High Performance Applications

Bae, G., Bae, D.-I., Kang, M., Hwang, S. M., Kim, S. S., Seo, B., Kwon, T. Y., Lee, T. J., Moon, C., Choi, Y. M., et al. (2018) · 2018 IEEE International Electron Devices Meeting (IEDM)

Advancements in Semiconductor Devices and Circuit DesignLow-power high-performance VLSI design

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