CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters
Integrity signals
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Each is checked against this paper’s own text: does it say what the citing paper says it does?
The designed ADC has a differential architecture to minimize common-mode noise effects and reduce even-order harmonic distortion.
“Additionally, the designed ADC has a differential architecture to minimize the effects of common-mode noise and to reduce the even order harmonics distortion [2].”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [2]
The chosen Cu value also meets the requirement that thermal noise introduced by the switches must be smaller than the quantization noise of an ideal 10-bit ADC.
“This value also meets with the requirement that the thermal noise introduced by the switches must be smaller than the quantization noise of the ideal 10-bit ADC [2].”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [2]
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A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS
Campos, A. L., Navarro, J., Luppe, M., & de Lima, E. R. (2021) · Analog Integrated Circuits and Signal Processing · doi:10.1007/s10470-020-01742-6 · Cited by 8 · see citing works
- Authors
- Plassche, R.
- Corresponding author
- Plassche, Rudy
- Venue
- Springer eBooks
- Publisher
- Springer US
- Published
- 2003
- OpenAlex
- W4236480226
- Cited by
- 394
- References
- 0
- Citations by year
- 2026: 2 · 2025: 10 · 2024: 7 · 2023: 18 · 2022: 12 · 2021: 11 · 2020: 15 · 2019: 18 · 2018: 20 · 2017: 21 · 2016: 12 · 2015: 20 · 2014: 19 · 2013: 24 · 2012: 25
- FWCI
- 8.47
- Type
- book
- Language
- en
- Open access
- closed
- Licence
- www.springer.com/tdm (tdm)
- Locations
- Springer eBooks (publishedVersion)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in PLL and VCO Technologies
- Keywords
- CMOS integrated circuit, analog-to-digital converter, digital-to-analog converter, analog filters, digital filters, output filtering, dynamic range, aliasing, filter order
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
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