Implementation of Bitsliced AES Encryption on CUDA-Enabled GPU
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Another AES implementation in [30] reaches 74.73 GB/s on a Tesla P100 GPU, corresponding to approximately 11% of its memory bandwidth.
“Another AES implementation with notable throughput is presented in [30], reaching a throughput of 74.73 GB/s on a Tesla P100 GPU, with a memory bandwidth of 733.3 GB, hence the throughput corresponds to approximately 11% of the memory bandwidth.”
From A novel single kernel parallel image encryption scheme based on a chaotic map (2024) · cites this paper as [30]
The proposed cipher's throughput corresponds to approximately 28% of the memory bandwidth on a Tesla V100 GPU, whereas the AES implementation of [30] corresponds to approximately 11% of the memory bandwidth on a Tesla P100 GPU.
“We achieved a throughput of 251.6 GB/s with a memory bandwidth of 900 GB, i.e., a throughput of approximately 28% of the memory bandwidth, which further demonstrates the superior performance of our approach.”
From A novel single kernel parallel image encryption scheme based on a chaotic map (2024) · cites this paper as [30]
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An, S., & Seo, S. C. (2020) · Applied Sciences · doi:10.3390/app10113711 · Cited by 26 · see citing works
A novel single kernel parallel image encryption scheme based on a chaotic map
Bezerra, J. I. M., Molter, A., Machado, G., Soares, R. I., & Camargo, V. V. D. A. (2024) · Journal of Real-Time Image Processing · doi:10.1007/s11554-024-01506-9 · Cited by 10 · see citing works
FPGA-friendly compact and efficient AES-like 8 × 8 S-box
Malal, A., & Tezcan, C. (2024) · Microprocessors and Microsystems · doi:10.1016/j.micpro.2024.105007 · Cited by 7 · see citing works
Malal, A., & Tezcan, C. (2026) · Journal of Cryptographic Engineering · doi:10.1007/s13389-025-00388-2 · Cited by 3 · see citing works
“It was observed that the best table-based implementation of AES on GPUs [6] provide significantly better performance than the straightforward and bitsliced implementations of AES [68].”
A Novel Single Kernel Parallel Image Encryption Scheme Based on a Chaotic Map
Moreira Bezerra, J., Machado, G., Molter, A., Soares, R., & Camargo, V. (2023) · doi:10.2139/ssrn.4598075
A novel single kernel parallel image encryption scheme based on a chaotic map
Bezerra, J. I. M., Camargo, V. V. D. A., Soares, R. I., Molter, A., & Machado, G. (2024) · doi:10.21203/rs.3.rs-4208203/v1
- Authors
- Nishikawa, N., Amano, H., & Iwai, K.
- Affiliations
- Keio University (JP)
- National Defense Academy of Japan (JP)
- Corresponding author
- Nishikawa, Naoki
- ORCID
- Amano, Hideharu
- Venue
- Lecture Notes in Computer Science
- Publisher
- Springer International Publishing
- Published
- 2017
- Pages
- 273-287
- ISSN
- 0302-9743 (ISSN-L)
- 1611-3349
- OpenAlex
- W2737356556
- Cited by
- 42
- References
- 0
- Citations by year
- 2026: 3 · 2025: 3 · 2024: 5 · 2023: 5 · 2022: 4 · 2021: 9 · 2020: 7 · 2019: 2 · 2018: 3 · 2017: 1
- FWCI
- 1.62
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Lecture notes in computer science (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Artificial Intelligence › Cryptographic Implementations and Security
- Physical Sciences › Computer Science › Hardware and Architecture › Parallel Computing and Optimization Techniques
- Physical Sciences › Computer Science › Information Systems › Cryptography and Residue Arithmetic
- Keywords
- AES encryption, GPU acceleration, CUDA, timing attacks, shared memory, throughput
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Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
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