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Cited by 16Parallel Computing and Optimization TechniquesLogic, programming, and type systemsEmbedded Systems Design Techniques

Language Extensions in Support of Compiler Parallelization

Shirako, Jun, Kasahara, Hironori, Sarkar, Vivek·2008·Lecture Notes in Computer Science
DOI 10.1007/978-3-540-85261-2_6
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Crossref · 10.1007/978-3-540-85261-2_6

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22 of 22 references verified0 citation errors · 0 not checkable

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  • The 2005 ITRS prediction was that clock rates should have exceeded 10GHz in 2008 and topped 15GHz in 2010.

    “The 2005 prediction was that clock rates should have exceeded 10GHz in 2008, topping 15GHz in 2010.”

    From A view of the parallel computing landscape (2009) · cites this paper as [16]

  • Intel products are today far below even the conservative 2007 ITRS prediction.

    “Note that Intel products are today far below even the conservative 2007 prediction.”

    From A view of the parallel computing landscape (2009) · cites this paper as [16]

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Authors
Shirako, J., Kasahara, H., & Sarkar, V.
Affiliations
  • Waseda University (JP)
  • Rice University (US)
ORCID
Venue
Lecture Notes in Computer Science
Publisher
Springer Berlin Heidelberg
Published
2008-08-12
Pages
78-94
ISSN
  • 0302-9743 (ISSN-L)
  • 1611-3349
DOI
10.1007/978-3-540-85261-2_6
OpenAlex
W1577310002
Cited by
16
References
22
Citations by year
2021: 1 · 2014: 1 · 2012: 2
FWCI
2.35
Type
conference paper
Language
en
Open access
closed
Locations
Lecture notes in computer science (publishedVersion)
Topics
  • Physical Sciences › Computer Science › Hardware and Architecture › Parallel Computing and Optimization Techniques
  • Physical Sciences › Computer Science › Artificial Intelligence › Logic, programming, and type systems
  • Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
Keywords
compiler parallelization, language extension, automatic parallelization, multidimensional arrays, privatization, object-oriented programming languages, parallel programming languages

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