Cited by 279Formal Methods in VerificationLogic, programming, and type systemsSoftware Testing and Debugging Techniques

The DOI matches its Crossref record; 123 of the 131 references it cites were found in a registry or an index.

A survey of recent advances in SAT-based formal verification

Prasad, Mukul R., Biere, Armin, Gupta, Aarti·2005·International Journal on Software Tools for Technology Transfer

Overview

Integrity signals

Registry

Crossref · 10.1007/s10009-004-0183-4

Cites

123 of 123 references verified0 citation errors · 0 not checkable

Statistics

Recomputing p-values needs the paper’s full text.

Verification

Claims the paper makes

We couldn’t retrieve this paper’s full text, so its claims and self-check weren’t run. The registry and citation checks still apply.

Claims other papers make about this one

Each is checked against this paper’s own text: does it say what the citing paper says it does?

  • Algorithms for Circuit SAT can be used to solve problems related to electronic circuits, including design automation, circuit equivalence and model checking.

    “Algorithms for Circuit SAT can be used to solve a plethora of problems related to electronic circuits; examples include design automation, circuit equivalence and model checking. 20”

    From Quantum algorithms: an overview (2016) · cites this paper as [20]

Citations

Cites

Flagged first, then by citations

8 of the 131 references couldn’t be matched to a known paper.

Research works printed but not linked: 6

  1. Donini FM, Liberatore P, Massacci F, Schaerf M (2002) Solving QBF with SMV. In: Proceedings of the 8th international conference on principles of knowledge representation and reasoning (KR), pp 578–589
  2. Gupta A, Yang Z, Ashar P, Gupta A (2000) SAT based state reachability analysis and model checking. In: Hunt WA, Johnson SD (eds) Proceedings of the 3rd international conference on formal methods in computer-aided design (FMCAD), November 2000. Lecture notes in computer science, vol 1954. Springer, Berlin Heidelberg New York, pp 354–371
  3. Sheng S, Takayama K, Hsiao MS (2002) Effective static property checking using simulation-based ATPG. In: Proceedings of the 39th conference on design automation (DAC), June 2002, pp 813–818
  4. Stockmeyer LJ, Meyer AR (1973) Word problems requiring exponential time. In: Proceedings of the 5th annual ACM symposium on the theory of computing (STOC), pp 1–9
  5. Whittemore JP, Kim J, Sakallah KA (2001) SATIRE: A new incremental satisfiability engine. In: Proceedings of the 38th conference on design automation (DAC), June 2001, pp 542–545 · DOI
  6. Zhang L, Malik S (2002) Towards symmetric treatment of conflicts and satisfaction in quantified Boolean satisfiability solvers. In: Van Hentenryck P (ed) Proceedings of the 8th international conference on principles and practice of constraint programming (CP). Lecture notes in computer science, vol 2470. Springer, Berlin Heidelberg New York, pp 200–215

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Metadata

Authors
Prasad, M. R., Biere, A., & Gupta, A.
Affiliations
  • Fujitsu (United States) (US)
  • Johannes Kepler University of Linz (AT)
Corresponding author
Biere, Armin
Venue
International Journal on Software Tools for Technology Transfer
Published
2005-01-25
Volume
7
Issue
2
Pages
156-173
ISSN
  • 1433-2779 (ISSN-L)
  • 1433-2787
OpenAlex
W2001859357
Cited by
279
References
131
Citations by year
2026: 2 · 2025: 5 · 2024: 5 · 2023: 9 · 2022: 4 · 2021: 10 · 2020: 10 · 2019: 11 · 2018: 17 · 2017: 10 · 2016: 14 · 2015: 11 · 2014: 12 · 2013: 15 · 2012: 14
FWCI
22.59
Type
journal article
Language
en
Open access
closed
Locations
International Journal on Software Tools for Technology Transfer (publishedVersion)
Topics
  • Physical Sciences › Computer Science › Computational Theory and Mathematics › Formal Methods in Verification
  • Physical Sciences › Computer Science › Software › Logic, programming, and type systems
  • Physical Sciences › Computer Science › Software › Software Testing and Debugging Techniques
Keywords
bounded model checking, model checking, SAT solvers, design verification

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Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.

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