Merged capacitor switching based SAR ADC with highest switching energy-efficiency
Abstract
A modified merged capacitor switching (MCS) scheme is proposed for the successive approximation register (SAR) analogue-to-digital converter (ADC). The conventional MCS technique previously applied to a pipelined ADC improves signal processing speed and, with use in the SAR ADC, this scheme achieves lowest switching energy among existing switching schemes. The MCS scheme achieves 93.4% less switching energy as compared to the conventional architecture.
Integrity signals
Registry
Cites
Statistics
Claims the paper makes
Claims other papers make about this one
Each is checked against this paper’s own text: does it say what the citing paper says it does?
The merged capacitor switching scheme provides good switching efficiency and low digital circuitry complexity.
“It provides good switching efficiency and a low digital circuitry complexity.”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [12]
The applied merged capacitor switching scheme reduced the current sink from vrefp and kept low the power consumption wasted with the DAC charge distribution.
“Additionally, the applied merged capacitor switching scheme [12] reduced the current sink from vrefp and kept low the power consumption wasted with the DAC charge distribution.”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [12]
Cited by
Sorted by citations
A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS
Campos, A. L., Navarro, J., Luppe, M., & de Lima, E. R. (2021) · Analog Integrated Circuits and Signal Processing · doi:10.1007/s10470-020-01742-6 · Cited by 8 · see citing works
- Authors
- Hariprasath, V., Guerber, J., Lee, S.-H., & Moon, U.-K.
- Affiliations
- Oregon State University (US)
- Sogang University (KR)
- Venue
- Electronics Letters
- Published
- 2010-04-29
- Volume
- 46
- Issue
- 9
- Pages
- 620-621
- ISSN
- 0013-5194 (ISSN-L)
- 1350-911X
- OpenAlex
- W2125521827
- Cited by
- 298
- References
- 0
- Citations by year
- 2026: 5 · 2025: 12 · 2024: 14 · 2023: 16 · 2022: 19 · 2021: 17 · 2020: 20 · 2019: 21 · 2018: 24 · 2017: 31 · 2016: 22 · 2015: 36 · 2014: 24 · 2013: 20 · 2012: 10
- FWCI
- 6.98
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- Electronics Letters (publishedVersion)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- successive approximation register ADC, pipelined ADC, analog-to-digital converter architecture
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review