Theory and implementation of a very high throughput true random number generator in field programmable gate array
Abstract
The contribution of this paper is proposing a new entropy extraction mechanism based on sampling phase jitter in ring oscillators to make a high throughput true random number generator in a field programmable gate array (FPGA) practical. Starting from experimental observation and analysis of the entropy source in FPGA, a multi-phase sampling method is exploited to harvest the clock jitter with a maximum entropy and fast sampling speed. This parametrized design is implemented in a Xilinx Artix-7 FPGA, where the carry chains in the FPGA are explored to realize the precise phase shifting. The generator circuit is simple and resource-saving, so that multiple generation channels can run in parallel to scale the output throughput for specific applications. The prototype integrates 64 circuit units in the FPGA to provide a total output throughput of 7.68 Gbps, which meets the requirement of current high-speed quantum key distribution systems. The randomness evaluation, as well as its robustness to ambient temperature, confirms that the new method in a purely digital fashion can provide high-speed high-quality random bit sequences for a variety of embedded applications.
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Post-processing can increase the probability of bits passing randomness tests while reducing throughput.
“Usually, using postprocessing can increase that the probability of bits passing the test, while their throughput will be reduced [86].”
From True Random Number Generators Using Electrical Noise (2019) · cites this paper as [86]
Cites
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True Random Number Generators Using Electrical Noise
Gong, L., Zhang, J., Liu, H., Sang, L., & Wang, Y. (2019) · IEEE Access · doi:10.1109/access.2019.2939027 · Cited by 77 · see citing works
“Usually, using postprocessing can increase that the probability of bits passing the test, while their throughput will be reduced [86].”
Self-citation
- Authors
- Wang, Y., Hui, C., Liu, C., & Xu, C.
- Affiliations
- University of Science and Technology of China (CN)
- Venue
- Review of Scientific Instruments
- Publisher
- AIP Publishing
- Published
- 2016-04-01
- Volume
- 87
- Issue
- 4
- Pages
- 044704-044704
- ISSN
- 0034-6748 (ISSN-L)
- 1089-7623
- OpenAlex
- W2340448478
- Cited by
- 21
- References
- 16
- Citations by year
- 2026: 1 · 2025: 4 · 2024: 2 · 2023: 2 · 2022: 1 · 2021: 3 · 2020: 3 · 2019: 4 · 2018: 1
- FWCI
- 2.53
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- Review of Scientific Instruments (publishedVersion)
- PubMed (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in PLL and VCO Technologies
- Physical Sciences › Computer Science › Artificial Intelligence › Quantum Information and Cryptography
- Keywords
- true random number generator, FPGA, ring oscillator, clock jitter, entropy extraction, high throughput, quantum key distribution, randomness testing, temperature robustness
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