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Cited by 9Silicon Carbide Semiconductor TechnologiesMultilevel Inverters and ConvertersAdvanced DC-DC Converters

The DOI matches its Crossref record; 27 of the 29 references it cites were found in a registry or an index; none of the 6 sources its claims cite is checked for support yet.

Simulation-Assisted Design of a Power Stack for Improving Static Current Sharing Among Three IGBT Modules Connected in Parallel

Open access
Li, Zheng-Feng, Nishida, Nobuya, Aoki, Hirotoshi, Shibata, Hisashi, Liao, Chih-Chia, Huang, Ming-Shi·2022·IEEE Access
DOI 10.1109/access.2022.3144575
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Abstract

In this study, cosimulation with Q3D and Simplorer were adopted to design a single-phase power stack with equal output current on three paralleled IGBT modules in high power application, therefore, the derating of total current will be reduced, which can improve the current utilization and power density of power stack. The performance of the designed stack was verified using a double-pulse test (DPT). The circuit used in the DPT regarded the power stack output current as static current, which is a critical index to evaluate current sharing. The static current sharing among the IGBT modules was mainly dependent on the stray inductance of the DC busbar, IGBT modules, and phase output bar (POB), which is used to connect the IGBT modules to load, in parallel paths of the power stack. Cosimulation was performed to determine the stray inductance of the IGBT modules, DC busbar and POB, and a constant-current-slope method was used to verify the inductance. Subsequently, design the shapes of DC busbar and POB for attaining maximum ratio of imbalanced current (MRIC) of the three IGBT modules is within 3% under 200% (2400A) rated current. The cosimulation results indicated that the MRIC of the current paths in power stack were 0.8%. Finally, three IGBT modules and a gate driver were used to construct power stack with 1000V DC link. The experimental results obtained by DPT indicated that the MRIC was 0.9% under 200% rated current, demonstrating the effectiveness of the proposed stray inductance design method.

Overview

CoChat Summary

TL;DR

A simulation-assisted design method using Q3D–Simplorer cosimulation is proposed to equalize stray inductance in the static current paths of three paralleled IGBT modules in a single-phase power stack. The designed T-type phase output bar (POB) achieved a maximum ratio of imbalanced current (MRIC) of 0.8% in simulation and 0.9% experimentally under 200% rated current.

Key findings

  • The proposed POB reduced current imbalance compared with a traditional POB: cosimulated MRIC was 0.8% versus 5.9%, and maximum current difference (MCD) was 30 A versus 216 A.
  • In the double-pulse test (DPT), the proposed POB achieved an MRIC of 0.9% under 200% rated current (2400 A per IGBT module), with MCD decreasing from 161 A to 38 A when replacing the traditional POB.
  • Stray inductance verification showed the IGBT module static-path inductance was measured at 36.5 nH versus 30.3 nH simulated; the proposed POB simulation and experimental stray inductances matched with maximum error less than 3.1%.
  • The DC busbar stray inductances along the three paths were 22 nH, 19 nH, and 22 nH, and the IGBT module stray inductances represented nearly 50% of the total, giving them an important influence on static current balancing.

Methods

  • Q3D and Simplorer cosimulation were used to design a laminated DC busbar and a T-type POB for a single-phase power stack containing three paralleled Mitsubishi CM1200DW-34T half-bridge IGBT modules (1200 A rated), a 1000 V DC link, nine film capacitors of 760 µF each (6840 µF total), and a single gate driver.
  • Stray inductance was extracted using a constant-current-slope method from 0 to 2400 A in 80 µs per path; cosimulation used an ideal gate driver, a 9.5 µH load inductor, and a total output current of 7200 A at 200% rated current.
  • Experimental verification used a DPT with digital oscilloscopes, 6 kA current probes, and a DSP-based control board; MRIC and MCD were compared between traditional and proposed POBs.

Limitations

  • The paper states that no Spice model was available for the IGBT modules, so the high-side IGBT was assumed always off and the low-side IGBT was driven by an ideal gate driver in cosimulation.
  • The paper states that the IGBT module simulation used a simplified flat copper bonding model rather than a multiple wire-bonding model, which likely explains why the measured static-path inductance (36.5 nH) exceeded the simulated value (30.3 nH).
  • The paper states that DPT wiring of the load inductor affects current balancing and must be perpendicular to the POB and DC busbar; it also notes that proximity effect may have increased IGBT 2 impedance in the experiment. Evident from the scope, validation is limited to a single-phase power stack and static current sharing under DPT, not a full three-phase inverter or dynamic current sharing.

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Integrity signals

Registry

Crossref · 10.1109/access.2022.3144575

Cites

27 of 27 references verified0 citation errors · 0 not checkable

Statistics

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Figures

FIGURE 1 Schematic of the power stack used in the DPT: (a) circuit; (b) definitions of the static and dynamic current.
FIGURE 1 Schematic of the power stack used in the DPT: (a) circuit; (b) definitions of the static and dynamic current.CC-BY · From the PDF
Image 2
CC-BY · From the PDF
FIGURE 3 Equivalent circuit of current flow paths for the proposed power stack in the DPT.
FIGURE 3 Equivalent circuit of current flow paths for the proposed power stack in the DPT.CC-BY · From the PDF
FIGURE 4 Design procedure for the proposed power stack.
FIGURE 4 Design procedure for the proposed power stack.CC-BY · From the PDF
FIGURE 5 Connection of the adopted gate driver to the three IGBT modules connected in parallel.
FIGURE 5 Connection of the adopted gate driver to the three IGBT modules connected in parallel.CC-BY · From the PDF
FIGURE 6 Adopted IGBT module (Mitsubishi CM1200DW-34T) and its simplified flat copper bonding model.
FIGURE 6 Adopted IGBT module (Mitsubishi CM1200DW-34T) and its simplified flat copper bonding model.CC-BY · From the PDF
FIGURE 7 Equivalent circuit, approximate wire bonding and static/dynamic current path of the IGBT module (CM1200DW-34T): (a) dynamic path; (b) static path.
FIGURE 7 Equivalent circuit, approximate wire bonding and static/dynamic current path of the IGBT module (CM1200DW-34T): (a) dynamic path; (b) static path.CC-BY · From the PDF
FIGURE 8 Simulated stray inductances and parasitic resistance inside the IGBT module (CM1200DW-34T).
FIGURE 8 Simulated stray inductances and parasitic resistance inside the IGBT module (CM1200DW-34T).CC-BY · From the PDF
FIGURE 9 (a) Equivalent circuit of the low-side IGBT in the turn-on period of the DPT; (b) die level output curve of the IGBT [21].
FIGURE 9 (a) Equivalent circuit of the low-side IGBT in the turn-on period of the DPT; (b) die level output curve of the IGBT [21].CC-BY · From the PDF
FIGURE 10 Proposed DC busbar and its stray inductance measurement setup: (a) shape and dimension; (b) measurement setup under simulation.
FIGURE 10 Proposed DC busbar and its stray inductance measurement setup: (a) shape and dimension; (b) measurement setup under simulation.CC-BY · From the PDF
FIGURE 11 Simulated stray inductance values of the DC busbar.
FIGURE 11 Simulated stray inductance values of the DC busbar.CC-BY · From the PDF
FIGURE 12 POB structure: (a) traditional POB; (b) proposed POB.
FIGURE 12 POB structure: (a) traditional POB; (b) proposed POB.CC-BY · From the PDF
FIGURE 13 Design procedure for the proposed POB structure.
FIGURE 13 Design procedure for the proposed POB structure.CC-BY · From the PDF
FIGURE 14 Relationship between the hollow dimensions (L and W) and MRID of the proposed convergence part.
FIGURE 14 Relationship between the hollow dimensions (L and W) and MRID of the proposed convergence part.CC-BY · From the PDF
FIGURE 15 Simulated inductance of the convergence part: (a) W D 15mm and L from 0mm to 180mm; (b) L D 140mm and W from 0mm to 20mm.
FIGURE 15 Simulated inductance of the convergence part: (a) W D 15mm and L from 0mm to 180mm; (b) L D 140mm and W from 0mm to 20mm.CC-BY · From the PDF
Image 16
CC-BY · From the PDF
FIGURE 16 Stray inductance measurement setup for the POB in the cosimulation: (a) convergence part; (b) entire POB.
FIGURE 16 Stray inductance measurement setup for the POB in the cosimulation: (a) convergence part; (b) entire POB.CC-BY · From the PDF
Image 18
CC-BY · From the PDF
FIGURE 17 Cosimulation setup of the designed power stack in the DPT: (a) function block; (b) implementation of the power stack simulation model in Simplorer.
FIGURE 17 Cosimulation setup of the designed power stack in the DPT: (a) function block; (b) implementation of the power stack simulation model in Simplorer.CC-BY · From the PDF
Image 20
CC-BY · From the PDF
FIGURE 18 Cosimulation results for current sharing in the power stack: (a) traditional POB and (b) proposed POB. ( V DC : 1000V, load inductor: 9.5 H, drive signal: ideal PWM, IGBT module: CM1200DW-34T).
FIGURE 18 Cosimulation results for current sharing in the power stack: (a) traditional POB and (b) proposed POB. ( V DC : 1000V, load inductor: 9.5 H, drive signal: ideal PWM, IGBT module: CM1200DW-34T).CC-BY · From the PDF
FIGURE 19 Cosimulation results of current sharing in the power stack in the proposed POB when only considering the convergence part. ( V DC : 1000V, load inductor: 9.5 H, drive signal: ideal PWM, IGBT module: CM1200DW-34T).
FIGURE 19 Cosimulation results of current sharing in the power stack in the proposed POB when only considering the convergence part. ( V DC : 1000V, load inductor: 9.5 H, drive signal: ideal PWM, IGBT module: CM1200DW-34T).CC-BY · From the PDF
FIGURE 20 Stray inductance distribution of the power stack: (a) the traditional POB; (b) the proposed POB.
FIGURE 20 Stray inductance distribution of the power stack: (a) the traditional POB; (b) the proposed POB.CC-BY · From the PDF
Image 24
CC-BY · From the PDF
FIGURE 21 Measurement setup and proposed power stack: (a) test bench and (b) power stack.
FIGURE 21 Measurement setup and proposed power stack: (a) test bench and (b) power stack.CC-BY · From the PDF
FIGURE 22 Measured waveforms of the voltage V CE (module) and current i c of the lower-side IGBT. ( V DC : 30V, load inductor: 0.68 H, Rg : 0.6 , Vge _ on : 15V, V ge _ off : 9.6V, temperature: 25 C, IGBT module: CM1200DW-34T).
FIGURE 22 Measured waveforms of the voltage V CE (module) and current i c of the lower-side IGBT. ( V DC : 30V, load inductor: 0.68 H, Rg : 0.6 , Vge _ on : 15V, V ge _ off : 9.6V, temperature: 25 C, IGBT module: CM1200DW-34T).CC-BY · From the PDF
FIGURE 23 Measured stray inductance measurements for the proposed POB. ( V DC : 300V, load inductor: 9.5 H, Rg : 0.6 , Vge _ on : 15V, V ge _ off : 9.6V, temperature: 25 C, IGBT module: CM1200DW-34T).
FIGURE 23 Measured stray inductance measurements for the proposed POB. ( V DC : 300V, load inductor: 9.5 H, Rg : 0.6 , Vge _ on : 15V, V ge _ off : 9.6V, temperature: 25 C, IGBT module: CM1200DW-34T).CC-BY · From the PDF
TABLE 6. Comparison between the simulation and experimental results for the three IGBT modules.
TABLE 6. Comparison between the simulation and experimental results for the three IGBT modules.CC-BY · From the PDF
FIGURE 25 Influence of the method of wiring the load inductor on the current balancing among the IGBT modules by experiment: (a) the wiring is parallel to the POB and (b) the wiring is perpendicular to the POB and DC busbar. ( V DC : 800V, load inductor: 9.5 H, Rg : 0.6 , Vge _ on : 15V, V ge _ off : 9.6V, temperature: 25 C, IGBT module: CM1200DW-34T).
FIGURE 25 Influence of the method of wiring the load inductor on the current balancing among the IGBT modules by experiment: (a) the wiring is parallel to the POB and (b) the wiring is perpendicular to the POB and DC busbar. ( V DC : 800V, load inductor: 9.5 H, Rg : 0.6 , Vge _ on : 15V, V ge _ off : 9.6V, temperature: 25 C, IGBT module: CM1200DW-34T).CC-BY · From the PDF
Image 30
CC-BY · From the PDF
Image 31
CC-BY · From the PDF
Image 32
CC-BY · From the PDF
Image 33
CC-BY · From the PDF
Image 34
CC-BY · From the PDF
Image 35
CC-BY · From the PDF

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Citations

Cites

Show all 29 references

Research works printed but not linked: 16

  1. Tsuda, LV100 high voltage dual package in paralleling operation, 1
  2. Laska, New traction converter with low inductive high-voltage half bridge IGBT module, 1
  3. 2013, Fuji IGBT Modules for MV, SVG Inverter
  4. 2011, Parallel Connection
  5. 2013, Solutions for Wind Energy Systems
  6. 2021, Power Electronics for Wind Turbines
  7. 2014, Paralleling of IGBTs
  8. 2017, IGBT Modules in Parallel Operation With Central and Individual Driver Board
  9. 2010, HybridPACKTM Automotive Power Modules
  10. 2020, The Next Generation Standard Module for High Power: LV100 Optimized for Renewable and Industrial Applications
  11. 2020, CM1200DW-34T, Datasheet
  12. 2013, Paralleling of IGBT Modules
  13. 2004, Paralleling of EconoPACKTM
  14. Wissen, Effects of influencing the individual leg inductance in case of paralleling modules on basis of XHP 3 and EconoDUAL, 1
  15. 2017, Parallel Connection for PrimePACK
  16. Bayerer, Parasitic inductance hindering utilization of power devices, 1

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Metadata

Authors
Li, Z.-F., Nishida, N., Aoki, H., Shibata, H., Liao, C.-C., & Huang, M.-S.
Affiliations
  • National Taipei University of Technology (TW)
  • Mitsubishi Electric (Japan) (JP)
  • Tamura Corporation (Japan) (JP)
ORCID
Venue
IEEE Access
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Published
2022
Volume
10
Pages
10079-10093
ISSN
2169-3536 (ISSN-L)
DOI
10.1109/access.2022.3144575
OpenAlex
W4206346422
Semantic Scholar
ed0ce8e9a50ccad56a14e93ba10bda3b8d528030
Cited by
9
References
29
Citations by year
2026: 1 · 2025: 3 · 2024: 3 · 2023: 2
FWCI
0.55
Type
journal article
Language
en
Open access
Licence
Locations
  • IEEE Access (publishedVersion, cc-by)
  • DOAJ (DOAJ: Directory of Open Access Journals) (submittedVersion, cc-by-sa)
Funders
TAMURA Corporation (208Q12)
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Silicon Carbide Semiconductor Technologies
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Multilevel Inverters and Converters
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced DC-DC Converters
Keywords
IGBT modules, current sharing, parasitic inductance, co-simulation, Simplorer, double pulse test, power density, high power applications

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CoChat. (2026). Citation check: Simulation-Assisted Design of a Power Stack for Improving Static Current Sharing Among Three IGBT Modules Connected in Parallel. https://app.cochat.ai/papers/10.1109/access.2022.3144575
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Li, Z.-F., Nishida, N., Aoki, H., Shibata, H., Liao, C.-C., & Huang, M.-S. (2022). Simulation-Assisted Design of a Power Stack for Improving Static Current Sharing Among Three IGBT Modules Connected in Parallel. IEEE Access. https://doi.org/10.1109/access.2022.3144575

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