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High efficiency power factor correction using interleaving techniques

Miwa, B.A., Otten, D.M., Schlecht, M.E.·2003·[Proceedings] APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition

Abstract

A highly efficient 1.5 kW power factor correction converter for computer applications is presented. Eight boost-topology switching cells are interleaved to meet stringent EMI input ripple specifications while operating at a very low switching frequency (25 kHz per cell) to minimize switching losses. The result is a system with very high conversion efficiency (94%-97%, including input bridge, bias supply, and EMI filter losses) over the 93-264 VAC input range. Key implementation details, including discontinuous inductor current operation, a combination of linear and bang-bang control algorithms for fast dynamic load response, and extended (100 ms) power outage ride-through capability, are described.>

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Metadata

Authors
Miwa, B. A., Otten, D. M., & Schlecht, M. E.
Venue
[Proceedings] APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition
Publisher
IEEE
Published
2003-01-02
Pages
557-568
OpenAlex
W2147206619
Cited by
363
References
0
FWCI
21.23
Type
conference paper
Language
en
Open access
closed

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CoChat. (2026). Citation check: High efficiency power factor correction using interleaving techniques. https://app.cochat.ai/papers/10.1109/apec.1992.228361
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Miwa, B. A., Otten, D. M., & Schlecht, M. E. (2003). High efficiency power factor correction using interleaving techniques. [Proceedings] APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition. https://doi.org/10.1109/apec.1992.228361

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