ADC trends and impact on SAR ADC architecture and analysis
Abstract
The performance of ADCs continues to improve with process scaling. For low to moderate resolutions, SAR ADCs deliver the best energy efficiency. Interleaved SAR converters have become popular for very high sampling speeds. The SAR assisted scheme has dramatically improved the energy efficiency of higher resolution pipeline ADCs. This paper reviews the fundamental limits of the energy efficiency of the SAR architecture, considering the energy consumption of the capacitor array and of the comparator. ADCs. ADC yield as a function of capacitor matching is also considered.
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The SAR architecture has few analog blocks, only switches and one comparator, and a simple design, making it well suited for moderate-resolution and low-to-medium data-rate applications.
“The SAR architecture, which presents few analog blocks (only switches and one comparator) and a simple design, is well suited for moderate resolution and low-to-medium data rate applications [3].”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [3]
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A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS
Campos, A. L., Navarro, J., Luppe, M., & de Lima, E. R. (2021) · Analog Integrated Circuits and Signal Processing · doi:10.1007/s10470-020-01742-6 · Cited by 8 · see citing works
- Authors
- Fredenburg, J., & Flynn, M. P.
- Affiliations
- University of Michigan (US)
- ORCID
- Flynn, Michael P.
- Venue
- 2015 IEEE Custom Integrated Circuits Conference (CICC)
- Publisher
- IEEE
- Published
- 2015-09
- Pages
- 1-8
- ISSN
- 0886-5930 (ISSN-L)
- OpenAlex
- W2177375315
- Cited by
- 18
- References
- 0
- Citations by year
- 2025: 7 · 2024: 2 · 2023: 2 · 2021: 2 · 2020: 1 · 2019: 1 · 2018: 2 · 2017: 1
- FWCI
- 1.92
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Custom Integrated Circuits Conference (publishedVersion)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- successive approximation register ADC, energy efficiency, capacitor array, capacitor matching, process scaling, pipelined ADC
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