A Fast Multidomain System-Level Simulation Model for GaN Transistor Package Optimization

Abstract

GaN devices, notwithstanding their superior performances in several power electronics applications, require advanced thermal management strategies to ensure device integrity and durability. Simulations can support the early design stage by identifying critical points and assessing the impact of packaging variations prior to fabrication. To guarantee the required level of accuracy, the modeling framework must properly capture the complex coupling between electrical and thermal domains. However, the high computational cost of fully coupled three-dimensional simulations often limits their usage in the design phase. To address this issue, this work proposes the extraction of an accurate thermal reduced order model of a packaged device from three-dimensional FEM simulations. The thermal reduced order model is then combined with the SPICE model of the device, including the electrical parasitics of the package extracted from electromagnetic simulations. In this way, a fully coupled SPICE-compatible model is obtained. Compared with transient FEM analyses, this SPICE-based approach significantly reduces computational time, enabling the investigation of a broader range of operating conditions. The proposed approach is then applied to compare the thermal behavior of two packaging techniques for a GaN transistor: one based on wire bonding and the other employing copper sinterconnects. As a figure of merit, the transient thermal impedance curves are derived for both package variations. The developed model can be applied to assess device performances in arbitrary electrical operating scenarios, provided that the thermal ROM and the extracted package parasitics remain valid within the frequency range of interest.