Cited by 15Advancements in Semiconductor Devices and Circuit DesignLow-power high-performance VLSI designSemiconductor materials and devices

The DOI matches its Crossref record; 10 of the 10 references it cites were found in a registry or an index.

On the Performance Limit of Impact-Ionization Transistors

Shen, C., Lin, J.-Q., Toh, E.-H., Chang, K.-F., Bai, P., Heng, C.-H., Samudra, G. S., Yeo, Y.-C.·2007·2007 IEEE International Electron Devices Meeting

Abstract

The trade-off between off-state leakage current and switching delay for impact-ionization MOS transistor (I-MOS) is pointed out and studied for the first time. This trade-off is unique for I-MOS devices, and is related to the self-amplifying carrier multiplication, the exact phenomenon used to be viewed as a merit. Monte-Carlo simulation is performed to study the random process of carrier multiplication in I-MOS, and the physical limit to the transistor switching delay is assessed. We found that at leakage constraints of 0.1muA/mum, silicon I-MOS shows long intrinsic switch-on delay (>10ps) and large random delay variance, hence does not show advantage in the delay/leakage trade-off compared to CMOS devices.

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Crossref · 10.1109/iedm.2007.4418878

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Research works printed but not linked: 8

  1. grekhov, 1982, Sov Phys Semicond, 16, 1276
  2. misawa, 1966, T-ED, 13, 137
  3. choi, 2004, IEDM
  4. shen, 2007, SSDM
  5. duncan, 1998, T-ED, 45, 867
  6. nirschl, 2004, IEDM, 195
  7. gopalakrishnan, 2002, IEDM, 289
  8. cartier, 1993, J Appl Phys, 62, 3339

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Metadata

Authors
Shen, C., Lin, J.-Q., Toh, E.-H., Chang, K.-F., Bai, P., Heng, C.-H., Samudra, G. S., & Yeo, Y.-C.
Affiliations
  • National University of Singapore (SG)
  • Institute of High Performance Computing (SG)
Venue
2007 IEEE International Electron Devices Meeting
Publisher
IEEE
Published
2007-12
Pages
117-120
ISSN
0163-1918 (ISSN-L)
OpenAlex
W2054690398
Cited by
15
References
10
Citations by year
2026: 1 · 2024: 2 · 2017: 1 · 2016: 2 · 2014: 2 · 2013: 1 · 2012: 1
FWCI
2.01
Type
conference paper
Language
en
Open access
closed
Locations
  • Technical digest - International Electron Devices Meeting/Technical digest (publishedVersion)
  • National University of Singapore (submittedVersion)
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in Semiconductor Devices and Circuit Design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Semiconductor materials and devices
Keywords
off-state leakage current, switching delay, carrier multiplication, performance bounds, CMOS comparison

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