Neural Recording Front-End Designs for Fully Implantable Neuroscience Applications and Neural Prosthetic Microsystems
Abstract
An implantable neural recording front-end has been designed in two versions. The first is a multi-channel signal-conditioning ASIC for use with any neural recording probe technology. This ASIC was implemented in a commercial 0.5 mum CMOS process, includes 16 parallel amplifier channels, and measures 2.3 mm2 The amplifiers have a gain of 59.5 dB, a high cutoff frequency at 9.1 kHz and consume 75 microW per channel. The low cutoff frequency is independently tunable on each channel to accept or reject field potentials. This chip is small enough to be chronically packaged for experiments in awake behaving animals or it can be integrated into a fully implantable neural recording microsystem. The second version of the front-end is a neural recording probe with integrated signal conditioning circuitry on the back-end implemented in a 3 microm CMOS process. This version dissipates 142 microW and includes 64 to 8 site selection, 8 per-channel amplifiers each having a gain of 50.2 dB, a tunable low cutoff frequency, and a 7 kHz upper cutoff frequency. Real-time site impedance and circuit testing has been integrated in this design.
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Multiplexing a high-density electrode array to a smaller amplifier array is a widely used resource-sharing technique that relies on not all electrode sites providing useful information after implantation or on necessary information being obtainable from a small subset, although the useful subset is not known in advance.
“The first widely used technique consists of multiplexing a high-density electrode array to a much smaller amplifier array. This strategy leverages the fact that not all electrode sites may provide useful information after implantation [97, 101, 145] or that the necessary information can be obtained from a small subset of electrodes, although the useful electrode subset is not known a priori [118].”
From Implantable neurotechnologies: a review of integrated circuit neural amplifiers (2016) · cites this paper as [101]
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References 12 · Cited by 30
- Authors
- Perlin, G. E., Sodagar, A. M., & Wise, K. D.
- Affiliations
- University of Michigan (US)
- ORCID
- Sodagar, A. M.
- Venue
- 2006 International Conference of the IEEE Engineering in Medicine and Biology Society
- Publisher
- IEEE
- Published
- 2006-08
- Volume
- 2006
- Pages
- 2982-2985
- ISSN
- 2375-7477 (ISSN-L)
- OpenAlex
- W1573495382
- Cited by
- 30
- References
- 12
- Citations by year
- 2022: 1 · 2017: 1 · 2016: 2 · 2015: 4 · 2014: 2 · 2013: 1 · 2012: 2
- FWCI
- 9.42
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC) (publishedVersion)
- PubMed (publishedVersion)
- Funders
- National Institutes of Health (n01ns002329-001)
- National Institute of Neurological Disorders and Stroke (N01-NS02329)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- implantable neural recording, neuroprosthetics, CMOS integrated circuit, low-power amplifier, field potentials
- MeSH terms
- Amplifiers, Electronic, Animals, Biomedical Engineering, Electrodes, Implanted, Electronics, Medical, Humans, Man-Machine Systems, Neurosciences, Prosthesis Design
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