The DOI matches its Crossref record; 1 of the 1 references it cites were found in a registry or an index.
Characterization of Early Breakdown of SiC MOSFET Gate Oxide by Voltage Ramp Tests
Abstract
In this work, we studied the behavior of gate oxide (GOx) breakdown of 1200V 4H-SiC DMOSFETs by a screening process of voltage ramp (vramp). By employing vramp between 40-50V on a 50nm GOx, early failures below 50V, which could be infant or extrinsic failures in time-dependent-dielectric-breakdown (TDDB) testing, were screened out. In addition, the results indicate that early failures correlate to the density of large pit defects on epi-wafer as well as to gate area of the devices, which have implications on the epi quality required for MOSFETs and for achievable yield on large-area SiC MOSFETs screened for long-term gate reliability. We also identified an electric field limit on the screening voltage, above which the traditional upward drift of threshold voltage (VTh) due to positive gate bias transitions to a downward drift, which can seriously degrade device performance.
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In the citing paper
“Other reports [29], [30], [31] show the presence of two phases in the dynamics of the shift, as shown in Fig. 9, which can be ascribed to the competition of two distinct trapping processes.”
From Review and Outlook on GaN and SiC Power Devices: Industrial State-of-the-Art, Applications, and Perspectives (2024) · cites this paper as [31]
In the citing paper
“A negative shift, ascribed to the generation of holes via impact-ionization within the oxide, as in Fig. 9. The time dependence observed here is exponential.”
From Review and Outlook on GaN and SiC Power Devices: Industrial State-of-the-Art, Applications, and Perspectives (2024) · cites this paper as [31]
In the citing paper
“An initial positive shift, with a logarithmic time dependence, generally associated with trapping at the interface and described using the inhibition model.”
From Review and Outlook on GaN and SiC Power Devices: Industrial State-of-the-Art, Applications, and Perspectives (2024) · cites this paper as [31]
In the citing paper
“For instance, Zheng et al. [31] proposed a voltage ramp at relatively high voltages, whereas Miki et al. [52] proposed the use of repeated V th measurements, to exclude transient instabilities.”
From Review and Outlook on GaN and SiC Power Devices: Industrial State-of-the-Art, Applications, and Perspectives (2024) · cites this paper as [31]
In the citing paper
“Recommendations aimed at avoiding excessive trapping that can lead to overestimations are to keep the stress field under a specific threshold, under 8.5 mV/cm according to Liu et al. [29] and under 7 mV/cm according to Zheng et al. [31].”
From Review and Outlook on GaN and SiC Power Devices: Industrial State-of-the-Art, Applications, and Perspectives (2024) · cites this paper as [31]
Citations
Cites
A Charge-to-Breakdown (QBD) Approach to SiC Gate Oxide Lifetime Extraction and Modeling
Moens, P., Franchi, J., Lettens, J., Schepper, L. D., Domeij, M., & Allerstam, F. (2020) · 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD) · doi:10.1109/ispsd46842.2020.9170097 · Cited by 38
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Research works printed but not linked: 16
- 10.1063/1.1839279 · DOI
- 10.7567/SSDM.2013.M-3-3 · DOI
- sun, 2016, Formation and reduction of large growth pits on 100mm 4° 4H-SiC, Mater Sci Forum, 858, 193, 10.4028/www.scientific.net/MSF.858.193 · DOI
- 10.4028/www.scientific.net/MSF.679-680.378 · DOI
- 10.1016/S0026-2714(01)00058-0 · DOI
- 10.1109/IRPS45951.2020.9129232 · DOI
- 10.1109/IRPS45951.2020.9128223 · DOI
- 10.4028/www.scientific.net/MSF.740-742.745 · DOI
- 10.1109/WiPDAAsia.2019.8760324 · DOI
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- 10.1016/j.sse.2004.05.005 · DOI
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- duval, 2018, Silicon Carbide – The next leg of growth in power semiconductors, Goldman Sachs Equity Research
- 10.1109/IEDM.2014.7046960 · DOI
- 10.4028/www.scientific.net/MSF.679-680.330 · DOI
Cited by
Sorted by citations
Buffolo, M., Favero, D., Marcuzzi, A., De Santi, C., Meneghesso, G., Zanoni, E., & Meneghini, M. (2024) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2023.3346369 · Cited by 476
Time-Dependent Dielectric Breakdown of Commercial 1.2 kV 4H-SiC Power MOSFETs
Liu, T., Zhu, S., White, M. H., Salemi, A., Sheridan, D., & Agarwal, A. K. (2021) · IEEE Journal of the Electron Devices Society · doi:10.1109/jeds.2021.3091898 · Cited by 80
Metadata
- Authors
- Zheng, Y., Potera, R., & Witt, T.
- Venue
- 2021 IEEE International Reliability Physics Symposium (IRPS)
- Publisher
- IEEE
- Published
- 2021-03
- Pages
- 1-5
- ISSN
- 0735-0791 (ISSN-L)
- OpenAlex
- W3157629010
- Cited by
- 16
- References
- 1
- Citations by year
- 2025: 6 · 2024: 4 · 2023: 3 · 2022: 2 · 2021: 1
- FWCI
- 3.92
- Type
- conference paper
- Language
- en
- Open access
- closed
- Licence
- Locations
- IEEE International Reliability Physics Symposium proceedings (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Silicon Carbide Semiconductor Technologies
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Semiconductor materials and devices
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radiation Effects in Electronics
- Keywords
- SiC MOSFET, gate oxide breakdown, time-dependent dielectric breakdown, pit defects, gate reliability, threshold voltage shift, device yield
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