The DOI matches its Crossref record.
A Practical Implementation of an IEEE1588 supporting Ethernet Switch
Abstract
To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.
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In the citing paper
“As the typical delay jitter for Ethernet switch queues has values around 100 ns, it was adopted the value of 1000 ns for a worst-case jitter value ( J i ) of the message streams for a 100 Mbps Ethernet, and 200 ns for a 1 Gbps Ethernet [30].”
From Real-Time Analysis of Time-Critical Messages in IEC 61850 Electrical Substation Communication Systems (2019) · cites this paper as [30]
Citations
Cited by
León, H., Montez, C., Valle, O., & Vasques, F. (2019) · Energies · doi:10.3390/en12122272 · Cited by 35
“As the typical delay jitter for Ethernet switch queues has values around 100 ns, it was adopted the value of 1000 ns for a worst-case jitter value ( J i ) of the message streams for a 100 Mbps Ethernet, and 200 ns for a 1 Gbps Ethernet [30].”
Method
Metadata
- Authors
- Kohler, D.
- Corresponding author
- Kohler, Daniel
- Venue
- 2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication
- Publisher
- IEEE
- Published
- 2007-10
- Pages
- 134-137
- ISSN
- 1949-0305 (ISSN-L)
- OpenAlex
- W1976320260
- Cited by
- 24
- References
- 0
- Citations by year
- 2019: 1 · 2018: 1 · 2017: 2 · 2016: 2 · 2015: 1 · 2014: 1 · 2013: 1 · 2012: 2
- FWCI
- 2.55
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Computer Networks and Communications › Network Time Synchronization Technologies
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in PLL and VCO Technologies
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Embedded Systems and FPGA Applications
- Keywords
- Precision Time Protocol, Ethernet switches, hardware implementation, timing distribution, network bridging
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