A 6-bit 600-MS/s 5.3-mW Asynchronous ADC in 0.13-$\mu{\hbox{m}}$ CMOS
Abstract
An asynchronous analog-to-digital converter (ADC) based on successive approximation is used to provide a high-speed (600-MS/s) and medium-resolution (6-bit) conversion. A high input bandwidth (>4 GHz) was achieved which allows its use in RF subsampling applications. By using asynchronous processing techniques, it avoids clocks at higher than the sample rate and speeds up a nonbinary successive approximation algorithm utilizing a series nonbinary capacitive ladder with digital radix calibration. The sample rate of 600 MS/s was achieved by time-interleaving two single ADCs, which were fabricated in a 0.13-mum standard digital CMOS process. The ADC achieves a peak SNDR of 34 dB, while only consuming an active area of 0.12mm2and having power consumption of 5.3 mW
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Asynchronous SAR ADCs require only one clock signal to control sampling, which relaxes clock distribution requirements.
“On the other hand, asynchronous SAR ADCs [7,8] require only one clock signal to control the sampling.This feature relaxes the clock distribution requirements.”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [7]
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References 18 · Cited by 423
- Authors
- Chen, S.-W. M., & Brodersen, R. W.
- Affiliations
- University of California, Berkeley (US)
- Venue
- IEEE Journal of Solid-State Circuits
- Published
- 2006-12
- Volume
- 41
- Issue
- 12
- Pages
- 2669-2680
- ISSN
- 0018-9200 (ISSN-L)
- 1558-173X
- OpenAlex
- W1976807891
- Cited by
- 423
- References
- 18
- Citations by year
- 2026: 6 · 2025: 27 · 2024: 17 · 2023: 24 · 2022: 26 · 2021: 18 · 2020: 14 · 2019: 24 · 2018: 40 · 2017: 35 · 2016: 28 · 2015: 29 · 2014: 29 · 2013: 24 · 2012: 22
- FWCI
- 5.63
- Type
- journal article
- Language
- en
- Open access
- closed
- Licence
- Locations
- IEEE Journal of Solid-State Circuits (publishedVersion)
- Topics
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in PLL and VCO Technologies
- Keywords
- asynchronous ADC, successive approximations, time interleaving, low power consumption, 6-bit ADC
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