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8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology
Abstract
An 8 Gb 4-stack 3-D DDR3 DRAM with through-Si-via is presented which overcomes the limits of conventional modules. A master-slave architecture is proposed which decreases the standby and active power by 50 and 25%, respectively. It also increases the I/O speed to${>}\,$1600 Mb/s for 4 rank/module and 2 module/channel case since the master isolates all chip I/O loadings from the channel. Statistical analysis shows that the proposed TSV check and repair scheme can increase the assembly yield up to 98%. By providing extra VDD/VSS edge pads, power noise is reduced to${≪}\,$100 mV even if all 4 ranks are refreshed every clock cycle consecutively.
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Cited by
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Park, J., Yu, T., Joshi, S., Maier, C., & Cauwenberghs, G. (2017) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2016.2572164 · Cited by 118
Training a Probabilistic Graphical Model With Resistive Switching Electronic Synapses
Eryilmaz, S. B., Neftci, E., Joshi, S., Kim, S., BrightSky, M., Lung, H.-L., Lam, C., Cauwenberghs, G., & Wong, H.-S. P. (2016) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2016.2616483 · Cited by 34
Metadata
- Authors
- Kang, U., Chung, H.-J., Heo, S., Park, D.-H., Lee, H., Kim, J. H., Ahn, S.-H., Cha, S.-H., Ahn, J., Kwon, D., Lee, J.-W., Joo, H.-S., Kim, W.-S., Jang, D. H., Kim, N. S., Choi, J.-H., Chung, T.-G., Yoo, J.-H., Choi, J. S., Kim, C., & Jun, Y.-H.
- Venue
- IEEE Journal of Solid-State Circuits
- Published
- 2010-01
- Volume
- 45
- Issue
- 1
- Pages
- 111-119
- ISSN
- 0018-9200 (ISSN-L)
- 1558-173X
- OpenAlex
- W2107304970
- Cited by
- 485
- References
- 0
- FWCI
- 53.83
- Type
- journal article
- Language
- en
- Open access
- closed
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- Kang, U., Chung, H.-J., Heo, S., Park, D.-H., Lee, H., Kim, J. H., Ahn, S.-H., Cha, S.-H., Ahn, J., Kwon, D., Lee, J.-W., Joo, H.-S., Kim, W.-S., Jang, D. H., Kim, N. S., Choi, J.-H., Chung, T.-G., Yoo, J.-H., Choi, J. S., . . . Jun, Y.-H. (2010). 8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology. IEEE Journal of Solid-State Circuits. https://doi.org/10.1109/jssc.2009.2034408
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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