Cited by 264Neuroscience and Neural EngineeringAnalog and Mixed-Signal Circuit DesignCCD and CMOS Imaging Sensors

An Implantable 455-Active-Electrode 52-Channel CMOS Neural Probe

Lopez, Carolina Mora, Andrei, Alexandru, Mitra, Srinjoy, Welkenhuysen, Marleen, Eberle, Wolfgang, Bartic, Carmen, Puers, Robert, Yazicioglu, Refet Firat +1 more·2014·IEEE Journal of Solid-State Circuits

Abstract

Neural probes have become the most important tool for enabling neuroscientists to place microelectrode sensors close to individual neurons and to monitor their activity in vivo. With such devices, it is possible to perform acute or chronic extracellular recordings of electrical activity from a single neuron or from groups of neurons. After the many developments in neural implants, it has become clear that large arrays of electrodes are desirable to further investigate the activity performed by complex neural networks. Therefore, in this paper, we propose a CMOS neural probe containing 455 active electrodes in the probe shank (100 μm wide, 10 mm long, and 50 μm thick) and 52 simultaneous readout channels in the probe body (2.9 × 3.3 mm2). In situ amplification under each electrode enables low-impedance interconnection lines, regardless of the electrode impedance, with a residual crosstalk of -44.8 dB. This design has been implemented in a 0.18-μm standard CMOS technology, with additional CMOS-compatible post-processing performed at wafer level to define the electrodes and the probe outline. In this architecture, the analog front-end achieves an input-referred noise of 3.2 μVrmsand an NEF of 3.08. The power consumption of the core circuit is 949.8 μW, while the total power consumption is 1.45 mW. The high-density active-electrode array in this neural probe allows for the massive recording of neural activity. In vivo measurements demonstrate successful simultaneous recordings from many individual cells.

Integrity signals

Registry

Crossref · 10.1109/jssc.2013.2284347

Cites

Statistics

Recomputing p-values needs the paper’s full text.

Claims the paper makes

This paper’s full text isn’t openly available, so its claims and self-check weren’t run. The registry and citation checks still apply.

Claims other papers make about this one

Each is checked against this paper’s own text: does it say what the citing paper says it does?

  • Lopez et al. multiplexed 455 electrode inputs to 52 amplifiers.

    “Another recent work by Lopez et al. [77] adopted the same method and multiplexed 455 electrode inputs to 52 amplifiers.”
  • Modern circuit designs and IC fabrication technologies have produced innovative designs that allow designers to relax the size-functionality compromises.

    “However, modern circuit designs [77, 92] and IC fabrication technologies [18, 86] have resulted in innovative designs, enabling designers to relax such compromises.”
  • Recent studies have attempted to reduce silicon area by using smaller unit capacitors or by reducing amplifier gain.

    “Recent studies have attempted to reduce the silicon area by using smaller unit capacitors or reducing the amplifier gain [77, 78].”
  • Continued shrinking of fine-line CMOS processes has helped increase channel counts and add capabilities such as on-chip analog-to-digital conversion and digital radio transmission.

    “The steady reduction in fine-line CMOS technologies has contributed to increased channel counts [6, 77] and expanded capabilities, such as on-chip analog-to-digital conversion [49, 156] and digital radio transmission [16, 67].”

The citation lists haven’t been fetched yet

References 42 · Cited by 264

Authors
Lopez, C. M., Andrei, A., Mitra, S., Welkenhuysen, M., Eberle, W., Bartic, C., Puers, R., Yazicioglu, R. F., & Gielen, G. G. E.
Affiliations
  • IMEC (BE)
  • KU Leuven (BE)
Venue
IEEE Journal of Solid-State Circuits
Published
2014-01
Volume
49
Issue
1
Pages
248-261
ISSN
  • 0018-9200 (ISSN-L)
  • 1558-173X
OpenAlex
W2139426119
Cited by
264
References
42
Citations by year
2026: 8 · 2025: 9 · 2024: 19 · 2023: 15 · 2022: 16 · 2021: 19 · 2020: 17 · 2019: 25 · 2018: 34 · 2017: 31 · 2016: 33 · 2015: 27 · 2014: 8 · 2013: 3
FWCI
11.48
Type
journal article
Language
en
Open access
closed
Locations
IEEE Journal of Solid-State Circuits (publishedVersion)
Funders
KU Leuven
Topics
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › CCD and CMOS Imaging Sensors
Keywords
neural probes, implantable neural interfaces, microelectrode arrays, crosstalk reduction, analog front-end, neural recording

About these checks

Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.

Statistics and arithmetic are recomputed, not judged.

Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.

What counts as a claim ›How we measure confidence ›How we check this ›

Are you an author, or do you see a problem with this page? Request a review