Cited by 104Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit DesignNeuroscience and Neural Engineering

Sub- $\mu$ Vrms-Noise Sub- $\mu$ W/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging

Kim, Chul, Joshi, Siddharth, Courellis, Hristos, Wang, Jun, Miller, Cory, Cauwenberghs, Gert·2018·IEEE Journal of Solid-State Circuits

Abstract

Integrated recording of neural electrical potentials from the brain poses great challenges due to stringent dynamic range requirements to resolve small-signal amplitudes buried in noise amidst large artifact and stimulation transients, as well as stringent power and volume constraints to enable minimally invasive untethered operation. Here, we present a 16-channel neural recording system-on-chip with greater than 90-dB input dynamic range and less than 1-μVrms input-referred noise from dc to 500 Hz, at 0.8-μW power consumption, and 0.024-mm2area per channel in a 65-nm CMOS process. Each recording channel features a hybrid analog-digital second-order oversampling analog-to-digital converter (ADC), with the biopotential signal coupling directly to the second integrator for high conversion gain and dynamic offset subtraction in the digital domain. This bypasses the need for high-pass filtering pre-amplification in neural recording systems, which often leads to signal distortion. The integrated ADC-direct neural recording offers record figureof-merit with a noise efficiency factor (NEF) of the combined front end and ADC of 1.81, and a corresponding power efficiency factor (PEF) of 2.6. Predictive digital autoranging of the binary quantizer further supports rapid transient recovery while maintaining fully dc-coupled operation. Hence, the neural ADC is capable of recording ≤ 0.01-Hz slow potentials as well as recovering from ≥ 200-mVpp transients within ≤ 1 ms that are important prerequisites to effective electrocortical recording for brain activity mapping. In vivo recordings from marmoset primate frontal cortex demonstrate its unique capabilities in resolving ultra-slow local field potentials indicative of subject arousal state.

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Crossref · 10.1109/jssc.2018.2870555

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  • Neural recording circuits have enabled high-quality measurements with noise levels below 1 μVrms from implantable microelectrode arrays by reducing the effect of common-mode noise through a pre-amplification stage in immediate proximity of the interface site.

    “Furthermore, neural recording circuits have enabled highquality measurements with noise levels below 1 μ Vrms from implantable microelectrode arrays [39] by reducing the effect of common-mode noise through a pre-amplification stage in the immediate proximity of the interface site.”

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References 17 · Cited by 104

Authors
Kim, C., Joshi, S., Courellis, H., Wang, J., Miller, C., & Cauwenberghs, G.
Affiliations
  • University of California San Diego (US)
  • University of Notre Dame (US)
  • University of California, Los Angeles (US)
Venue
IEEE Journal of Solid-State Circuits
Published
2018-11
Volume
53
Issue
11
Pages
3101-3110
ISSN
  • 0018-9200 (ISSN-L)
  • 1558-173X
OpenAlex
W2895657148
Cited by
104
References
17
Citations by year
2026: 7 · 2025: 10 · 2024: 17 · 2023: 15 · 2022: 20 · 2021: 16 · 2020: 12 · 2019: 7
FWCI
3.50
Type
journal article
Language
en
Open access
closed
Locations
IEEE Journal of Solid-State Circuits (publishedVersion)
Funders
  • University of California
  • National Science Foundation
Topics
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
Keywords
neural recording, oversampling analog-to-digital converter, system-on-chip, low-power analog-to-digital converter, input-referred noise, dynamic range, transient recovery, noise efficiency factor, local field potentials, frontal cortex

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