Cited by 10Embedded Systems Design TechniquesAdvanced Neural Network ApplicationsLow-power high-performance VLSI design

Toward Attention-Based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow

Open access
Wiese, Philip, İslamoğlu, Gamze, Scherer, Moritz, Macan, Luka, Jung, Victor Jean-Baptiste, Burrello, Alessio, Conti, Francesco, Benini, Luca·2025·IEEE Design & Test

Abstract

One of the challenges for Tiny Machine Learning (tinyML) is keeping up with the evolution of Machine Learning models from Convolutional Neural Networks to Transformers. We address this by leveraging a heterogeneous architectural template coupling RISC-V processors with hardwired accelerators supported by an automated deployment flow. We demonstrate Attention-based models in a tinyML power envelope with an octacore cluster coupled with an accelerator for quantized Attention. Our deployment flow enables end-to-end 8-bit Transformer inference, achieving leading-edge energy efficiency and throughput of 2960 GOp/J and 154GOp/s (0.65 V, 22nm FD-SOI technology).

Integrity signals

Registry

Crossref · 10.1109/mdat.2025.3527371

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10 of 10 references verified0 citation errors · 0 not checkable

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Authors
Wiese, P., İslamoğlu, G., Scherer, M., Macan, L., Jung, V. J.-B., Burrello, A., Conti, F., & Benini, L.
Affiliations
  • ETH Zurich (CH)
  • University of Bologna (IT)
  • Politecnico di Torino (IT)
  • Department of Information Technology and Electrical Engineering (D-ITET), ETH Zïrich, Zïrich, Switzerland
Venue
IEEE Design & Test
Published
2025-10
Volume
42
Issue
5
Pages
63-72
ISSN
  • 2168-2356 (ISSN-L)
  • 2168-2364
OpenAlex
W4406172504
Cited by
9
References
12
Citations by year
2026: 1 · 2025: 8
FWCI
6.20
Type
journal article
Language
en
Open access
Locations
  • IEEE Design and Test (publishedVersion)
  • Repository for Publications and Research Data (ETH Zurich) (acceptedVersion, other-oa)
  • arXiv (Cornell University) (submittedVersion, cc-by)
  • PORTO@Iris (submittedVersion, other-oa)
  • Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna) (submittedVersion, other-oa)
  • arXiv (Cornell University) (cc-by)
  • ETH Zürich Research Collection
Funders
  • Key Digital Technologies Joint Undertaking (101095947)
  • HORIZON EUROPE Digital, Industry and Space (101070374, 101070634)
Topics
  • Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
  • Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
Keywords
TinyML, attention-based models, transformer inference, RISC-V, heterogeneous architectures, hardware accelerators, energy efficiency, FDSOI

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