The DOI matches its Crossref record; 6 of the 6 references it cites were found in a registry or an index.
DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation
Abstract
Transformer is a deep learning language model widely used for natural language processing (NLP) services in datacenters. Among transformer models, Generative Pretrained Transformer (GPT) has achieved remarkable performance in text generation, or natural language generation (NLG), which needs the processing of a large input context in the summarization stage, followed by the generation stage that produces a single word at a time. The conventional platforms such as GPU are specialized for the parallel processing of large inputs in the summarization stage, but their performance significantly degrades in the generation stage due to its sequential characteristic. Therefore, an efficient hardware platform is required to address the high latency caused by the sequential characteristic of text generation. In this paper, we present DFX, a multi-FPGA acceleration appliance that executes GPT-2 model inference end-to-end with low latency and high throughput in both summarization and generation stages. DFX uses model parallelism and optimized dataflow that is model-and-hardware-aware for fast simultaneous workload execution among devices. Its compute cores operate on custom instructions and provide GPT-2 operations end-to-end. We implement the proposed hardware architecture on four Xilinx Alveo U280 FPGAs and utilize all of the channels of the high bandwidth memory (HBM) and the maximum number of compute resources for high hardware efficiency. DFX achieves 5.58$\times$ speedup and 3.99$\times$ energy efficiency over four NVIDIA V100 GPUs on the modern GPT-2 model. DFX is also 8.21$\times$ more cost-effective than the GPU appliance, suggesting that it is a promising solution for text generation workloads in cloud datacenters.
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“In pipelining, all the workers process one input completely, leading to large latency.”
From A Survey of Techniques for Optimizing Transformer Inference (2023) · cites this paper as [249]
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Cited by
Sorted by citations
A Survey of Techniques for Optimizing Transformer Inference
Chitty-Venkata, K. T., Mittal, S., Emani, M., Vishwanath, V., & Somani, A. K. (2023) · Journal of Systems Architecture · doi:10.1016/j.sysarc.2023.102990 · Cited by 154
Metadata
- Authors
- Hong, S., Moon, S., Kim, J., Lee, S., Kim, M., Lee, D., & Kim, J.-Y.
- Affiliations
- Korea Advanced Institute of Science and Technology (KR)
- NAVER Cloud (South Korea) (KR)
- Venue
- 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)
- Publisher
- IEEE
- Published
- 2022-10
- Pages
- 616-630
- ISSN
- 1072-4451 (ISSN-L)
- OpenAlex
- W4308083513
- Cited by
- 107
- References
- 6
- Citations by year
- 2026: 19 · 2025: 51 · 2024: 32 · 2023: 4 · 2022: 1
- FWCI
- 17.71
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- IEEE/ACM International Symposium on Microarchitecture (MICRO) (publishedVersion)
- Funders
- NAV
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
- Physical Sciences › Engineering › Electrical and Electronic Engineering › VLSI and FPGA Design Techniques
- Keywords
- text generation, natural language generation, model parallelism, custom instructions, high-bandwidth memory, GPU comparison, energy efficiency
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- The paper
- Hong, S., Moon, S., Kim, J., Lee, S., Kim, M., Lee, D., & Kim, J.-Y. (2022). DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation. 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO). https://doi.org/10.1109/micro56248.2022.00051