The DOI matches its Crossref record; 11 of the 11 references it cites were found in a registry or an index.
Algorithm-Based Fault Tolerance for Matrix Operations
Abstract
The rapid progress in VLSI technology has reduced the cost of hardware, allowing multiple copies of low-cost processors to provide a large amount of computational capability for a small cost. In addition to achieving high performance, high reliability is also important to ensure that the results of long computations are valid. This paper proposes a novel system-level method of achieving high reliability, called algorithm-based fault tolerance. The technique encodes data at a high level, and algorithms are designed to operate on encoded data and produce encoded output data. The computation tasks within an algorithm are appropriately distributed among multiple computation units for fault tolerance. The technique is applied to matrix compomations which form the heart of many computation-intensive tasks. Algorithm-based fault tolerance schemes are proposed to detect and correct errors when matrix operations such as addition, multiplication, scalar product, LU-decomposition, and transposition are performed using multiple processor systems. The method proposed can detect and correct any failure within a single processor in a multiple processor system. The number of processors needed to just detect errors in matrix multiplication is also studied.
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Cites
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Cited by
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Dutta, S., Cadambe, V., & Grover, P. (2019) · IEEE Transactions on Information Theory · doi:10.1109/tit.2019.2927558 · Cited by 313
On the Optimal Recovery Threshold of Coded Matrix Multiplication
Dutta, S., Fahim, M., Haddadpour, F., Jeong, H., Cadambe, V., & Grover, P. (2020) · IEEE Transactions on Information Theory · doi:10.1109/tit.2019.2929328 · Cited by 282
Analyzing and Increasing the Reliability of Convolutional Neural Networks on GPUs
Santos, F. F. D., Pimenta, P. F., Lunardi, C., Draghetti, L., Carro, L., Kaeli, D., & Rech, P. (2019) · IEEE Transactions on Reliability · doi:10.1109/tr.2018.2878387 · Cited by 226
Soft errors in DNN accelerators: A comprehensive review
Ibrahim, Y., Wang, H., Liu, J., Wei, J., Chen, L., Rech, P., Adam, K., & Guo, G. (2020) · Microelectronics Reliability · doi:10.1016/j.microrel.2020.113969 · Cited by 102
Understanding Error Propagation in GPGPU Applications
Li, G., Pattabiraman, K., Cher, C.-Y., & Bose, P. (2016) · SC16: International Conference for High Performance Computing, Networking, Storage and Analysis · doi:10.1109/sc.2016.20 · Cited by 89
Metadata
- Authors
- Huang, K.-H., & Abraham, J. A.
- Venue
- IEEE Transactions on Computers
- Published
- 1984-06
- Volume
- C-33
- Issue
- 6
- Pages
- 518-528
- ISSN
- 0018-9340 (ISSN-L)
- 1557-9956
- 2326-3814
- OpenAlex
- W2083613288
- Cited by
- 1,283
- References
- 11
- FWCI
- 7.25
- Type
- journal article
- Language
- en
- Open access
- closed
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Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
