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Noise modeling for RF CMOS circuit simulation

Scholten, A.J., Tiemeijer, L.F., van Langevelde, R., Havens, R.J., Zegers-van Duijnhoven, A.T.A., Venezia, V.C.·2003·IEEE Transactions on Electron Devices

Abstract

The RF noise in 0.18-/spl mu/m CMOS technology has been measured and modeled. In contrast to some other groups, we find only a moderate enhancement of the drain current noise for short-channel MOSFETs. The gate current noise on the other hand is more significantly enhanced, which is explained by the effects of the gate resistance. The experimental results are modeled with a nonquasi-static RF model, based on channel segmentation, which is capable of predicting both drain and gate current noise accurately. Experimental evidence is shown for two additional noise mechanisms: 1) avalanche noise associated with the avalanche current from drain to bulk and 2) shot noise in the direct-tunneling gate leakage current. Additionally, we show low-frequency noise measurements, which strongly point toward an explanation of the 1/f noise based on carrier trapping, not only in n-channel MOSFETs, but also in p-channel MOSFETs.

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Metadata

Authors
Scholten, A. J., Tiemeijer, L. F., van Langevelde, R., Havens, R. J., Zegers-van Duijnhoven, A. T. A., & Venezia, V. C.
Venue
IEEE Transactions on Electron Devices
Published
2003-03
Volume
50
Issue
3
Pages
618-632
ISSN
0018-9383 (ISSN-L)
OpenAlex
W2129712034
Cited by
382
References
0
FWCI
36.87
Type
journal article
Language
en
Open access
closed

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CoChat. (2026). Citation check: Noise modeling for RF CMOS circuit simulation. https://app.cochat.ai/papers/10.1109/ted.2003.810480
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Scholten, A. J., Tiemeijer, L. F., van Langevelde, R., Havens, R. J., Zegers-van Duijnhoven, A. T. A., & Venezia, V. C. (2003). Noise modeling for RF CMOS circuit simulation. IEEE Transactions on Electron Devices. https://doi.org/10.1109/ted.2003.810480

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