Robust True Random Number Generator using Stochastic Short-Term Recovery of Charge Trapping FinFET for Advanced Hardware Security
Abstract
In this work, we demonstrated a novel true random number generator (TRNG) utilizing stochastic short-term recovery of Charge- Trapping (CT) FinFET devices. The true random bits were generated by measuring the recovery time of CT-FinFET with a digital counter by a time-to-digital count converter (TDCC) unit. The resulting CT - TRNG circuit shows great immunity against a power noise of up to 600m V in amplitude and up to 1.5G Hz in frequency across a wide range of temperatures (-20 to 85°C). It passed all NIST 800-22 and NIST 800-90B randomness tests. We have shown this novel CT - TRNG to be the most promising high-reliability hardware security solution to date.
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A MOSFET-based tRNG with 100% CMOS compatibility has been demonstrated for high scalability and applicability to an advanced foundry platform by using random telegraph noise or random charge trapping effects as an entropy source.
“As an alternative to the circuit-based tRNGs, a MOSFET-based tRNG with 100% CMOS compatibility has been demonstrated for high scalability and applicability to an advanced foundry platform by using random telegraph noise or random charge trapping effects as an entropy source (24–26).”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [26]
The MOSFET-based tRNG's randomness is not fully verified, and high power consumption remains a problem in some cases.
“However, its randomness is not fully verified, and high power consumption remains a problem in some cases.”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [26]
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Cao, Y., Liu, W., Qin, L., Liu, B., Chen, S., Ye, J., Xia, X., & Wang, C. (2022) · Entropy · doi:10.3390/e24111566 · Cited by 46 · see citing works
“The TRNG using stochastic short-term recovery of CT-FinFET in [60].”
BackgroundMethodInfluentialCryptographic transistor for true random number generator with low power consumption
Kim, S.-I., You, H.-J., Kim, M.-S., An, U.-S., Kim, M.-S., Lee, D. H., Ryu, S.-T., & Choi, Y.-K. (2024) · Science Advances · doi:10.1126/sciadv.adk6042 · Cited by 33 · see citing works
“As an alternative to the circuit-based tRNGs, a MOSFET-based tRNG with 100% CMOS compatibility has been demonstrated for high scalability and applicability to an advanced foundry platform by using random telegraph noise or random charge trapping effects as an entropy source ( 24 – 26 ).”
A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse
Serrano, R., Duran, C., Sarmiento, M., Hoang, T.-T., Tsukamoto, A., Suzaki, K., & Pham, C. (2022) · IEEE Access · doi:10.1109/access.2022.3167690 · Cited by 13 · see citing works
“The analog-TRNG uses an entropy source based on the noise presented in some analog circuits [13]–[16].”
MethodA Novel 0.04 pJ/bit Dynamic TRNG using Bit Reconfigurable Ring Oscillators
Williams, S., Khalil, K., & Bayoumi, M. (2024) · IEEE SoutheastCon · doi:10.1109/southeastcon52093.2024.10500289 · Cited by 10 · see citing works
Wang, Y., Duan, W., Meng, J., Zhang, W., Liu, Z., Guo, D., Lv, Z., Yu, J., & Guan, H. (2025) · Journal of Materials Chemistry C · doi:10.1039/d4tc04963b · Cited by 7 · see citing works
Self-citationA Unified NVRAM and TRNG in Standard CMOS Technology
Serrano, R., Duran, C., Sarmiento, M., & Pham, C. (2022) · IEEE Access · doi:10.1109/access.2022.3193639 · Cited by 7 · see citing works
Zhao, J., Chen, B., Wang, W., et al. (2023) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2023.3302277 · Cited by 5 · see citing works
Cryptographic characteristics of true random number generators using gated silicon nanosheet diodes
Jeon, J., Shin, Y., Heo, H., et al. (2025) · Science China Information Sciences · doi:10.1007/s11432-024-4317-6 · Cited by 3 · see citing works
Kim, S.-I., Hong, I., Lee, S.-W., You, H.-J., An, U.-S., Han, J.-A., Kim, M., Ryu, S., & Choi, Y. (2026) · ACS Nano · doi:10.1021/acsnano.6c02362
- Authors
- Yang, J., Ding, Q., Gong, T., Luo, Q., Xue, X., Gao, Z., Yu, H., Yu, J., Xu, X., Yuan, P., Li, X., Tai, L., Chung, S. S., Lv, H., & Liu, M.
- Affiliations
- Chinese Academy of Sciences (CN)
- Fudan University (CN)
- National Yang Ming Chiao Tung University (TW)
- ORCID
- Venue
- 2020 IEEE Symposium on VLSI Technology
- Publisher
- IEEE
- Published
- 2020-06
- Pages
- 1-2
- OpenAlex
- W3107283604
- Cited by
- 9
- References
- 0
- Citations by year
- 2026: 1 · 2025: 2 · 2024: 2 · 2023: 1 · 2022: 3
- FWCI
- 0.75
- Type
- conference paper
- Language
- en
- Open access
- closed
- Licence
- Locations
- Symposium on VLSI Technology (publishedVersion)
- Funders
- National Natural Science Foundation of China (61834009,61904200,61821091)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Computer Science › Artificial Intelligence › Cryptographic Implementations and Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radiation Effects in Electronics
- Keywords
- true random number generator, short-term recovery, hardware security, temperature robustness, randomness testing, NIST SP 800-22, NIST SP 800-90B
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