Cited by 1RFID technology advancementsLow-power high-performance VLSI designRadio Frequency Integrated Circuit Design

A 915 MHz UHF low power RFID tag

Open access
Marcon, César, Palma, José Carlos, Hessel, Fabiano, Bezerra, Eduardo, Rohde, Guilherme, Reif, Carlos, Azevedo, Luciano, Metzler, Carolina·2007·Proceedings of the 20th annual conference on Integrated circuits and systems design

Abstract

This paper describes the implementation of a passive low power tag, which works on 915 MHz UHF frequency. The tag implements an innovative and efficient synchronization algorithm, which deals with significant reference clock variations. A flexible design flow is proposed for the customization, verification and synthesis of the digital block, targeting low power requirements.

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Registry

Crossref · 10.1145/1284480.1284555

Cites

14 of 14 references verified0 citation errors · 0 not checkable

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Authors
Marcon, C., Palma, J. C., Hessel, F., Bezerra, E., Rohde, G., Reif, C., Azevedo, L., & Metzler, C.
Affiliations
  • PPGCC / FACIN / PUCRS, Porto Alegre, Brazil
  • Universidade Federal do Rio Grande do Sul (BR)
  • Pontifícia Universidade Católica do Rio Grande do Sul (BR)
Venue
Proceedings of the 20th annual conference on Integrated circuits and systems design
Publisher
ACM
Published
2007-09-03
Pages
276-281
OpenAlex
W2063602193
Cited by
1
References
14
FWCI
0.48
Type
conference paper
Language
en
Open access
Locations
PUCRS Repository (Pontifical Catholic University of Rio Grande do Sul) (submittedVersion, cc-by-nc-sa)
Topics
  • Physical Sciences › Engineering › Media Technology › RFID technology advancements
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
Keywords
UHF RFID, passive RFID tags, low power design, 915 MHz, synchronization algorithms, clock skew, design flow, digital synthesis, verification

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