The DOI matches its Crossref record; 9 of the 9 references it cites were found in a registry or an index.
Page placement algorithms for large real-indexed caches
Open accessAbstract
When a computer system supports both paged virtual memory and large real-indexed caches, cache performance depends in part on the main memory page placement. To date, most operating systems place pages by selecting an arbitrary page frame from a pool of page frames that have been made available by the page replacement algorithm. We give a simple model that shows that this naive (arbitrary) page placement leads to up to 30% unnecessary cache conflicts. We develop several page placement algorithms, called careful-mapping algorithms, that try to select a page frame (from the pool of available page frames) that is likely to reduce cache contention. Using trace-driven simulation, we find that careful mapping results in 10–20% fewer (dynamic) cache misses than naive mapping (for a direct-mapped real-indexed multimegabyte cache). Thus, our results suggest that careful mapping by the operating system can get about half the cache miss reduction that a cache size (or associativity) doubling can.
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Cites
Smith, A. J. (1982) · ACM Computing Surveys · doi:10.1145/356887.356892 · Cited by 1,722
The cache performance and optimizations of blocked algorithms
Lam, M. D., Rothberg, E. E., & Wolf, M. E. (1991) · Proceedings of the fourth international conference on Architectural support for programming languages and operating systems - ASPLOS-IV · doi:10.1145/106972.106981 · Cited by 921
The working set model for program behavior
Denning, P. J. (1983) · Communications of the ACM · doi:10.1145/357980.357997 · Cited by 845
The working set model for program behavior
Denning, P. J. (1968) · Communications of the ACM · doi:10.1145/363095.363141 · Cited by 662
Evaluating associativity in CPU caches
Hill, M. D., & Smith, A. J. (1989) · IEEE Transactions on Computers · doi:10.1109/12.40842 · Cited by 606
Self-citationAgarwal, A., Hennessy, J., & Horowitz, M. (1989) · ACM Transactions on Computer Systems · doi:10.1145/63404.63407 · Cited by 304
On the inclusion properties for multi-level cache hierarchies
Baer, J.-L., & Wang, W.-H. (1998) · 25 years of the international symposia on Computer architecture (selected papers) · doi:10.1145/285930.285994 · Cited by 172
Kaplan, K., & Winder, R. O. (1973) · Computer · doi:10.1109/c-m.1973.217037 · Cited by 91
The TLB slice—a low-cost high-speed address translation mechanism
Taylor, G. S., Davies, P., & Farmwald, M. (1990) · ACM SIGARCH Computer Architecture News · doi:10.1145/325096.325161 · Cited by 91
Cited by
Xen and the art of virtualization
Barham, P., Dragovic, B., Fraser, K., Hand, S., Harris, T., Ho, A., Neugebauer, R., Pratt, I., & Warfield, A. (2003) · Proceedings of the nineteenth ACM symposium on Operating systems principles · doi:10.1145/945445.945462 · Cited by 2,107
(2016) · IACR Cryptology ePrint Archive · Cited by 1,288
Exokernel: an operating system architecture for application-level resource management
Engler, D. R., Kaashoek, M. F., & O'Toole, J. (1995) · Proceedings of the fifteenth ACM symposium on Operating systems principles - SOSP '95 · doi:10.1145/224056.224076 · Cited by 1,118
Metadata
- Authors
- Kessler, R. E., & Hill, M. D.
- Venue
- ACM Transactions on Computer Systems
- Published
- 1992-11
- Volume
- 10
- Issue
- 4
- Pages
- 338-359
- ISSN
- 0734-2071 (ISSN-L)
- 1557-7333
- OpenAlex
- W2112300321
- Cited by
- 285
- References
- 9
- FWCI
- 13.91
- Type
- journal article
- Language
- en
- Open access
- bronze
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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