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Design issues for dynamic voltage scaling

Open access
Burd, Thomas D., Brodersen, Robert W.·2000·Proceedings of the 2000 international symposium on Low power electronics and design - ISLPED '00

Abstract

Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the processors supply voltage so that it consumes the minimal amount of energy by operating at the minimum performance level required by the active software processes. A dynamically varying supply voltage has implications on the processor circuit design and design flow, but with some minimal constraints it is straightforward to design a processor with this capability.

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Metadata

Authors
Burd, T. D., & Brodersen, R. W.
Venue
Proceedings of the 2000 international symposium on Low power electronics and design - ISLPED '00
Publisher
ACM Press
Published
2000
Pages
9-14
OpenAlex
W2085583524
Cited by
363
References
0
FWCI
54.76
Type
conference paper
Language
en
Open access
bronze

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CoChat. (2026). Citation check: Design issues for dynamic voltage scaling. https://app.cochat.ai/papers/10.1145/344166.344181
The paper
Burd, T. D., & Brodersen, R. W. (2000). Design issues for dynamic voltage scaling. Proceedings of the 2000 international symposium on Low power electronics and design - ISLPED '00. https://doi.org/10.1145/344166.344181

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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.