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Damascene copper electroplating for chip interconnections

Andricacos, P. C., Uzoh, C., Dukovic, J. O., Horkans, J., Deligianni, H.·1998·IBM Journal of Research and Development

Abstract

Damascene Cu electroplating for on-chip metallization, which we conceived and developed in the early 1990s, has been central to IBM's Cu chip interconnection technology. We review here the challenges of filling trenches and vias with Cu without creating a void or seam, and the discovery that electrodeposition can be engineered to give filling performance significantly better than that achievable with conformal step coverage. This attribute of superconformal deposition, which we call superfilling, and its relation to plating additives are discussed, and we present a numerical model that represents the shape-change behavior of this system.

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Metadata

Authors
Andricacos, P. C., Uzoh, C., Dukovic, J. O., Horkans, J., & Deligianni, H.
Venue
IBM Journal of Research and Development
Publisher
IBM
Published
1998-09
Volume
42
Issue
5
Pages
567-574
ISSN
0018-8646 (ISSN-L)
OpenAlex
W2027228089
Cited by
1,222
References
0
FWCI
18.44
Type
journal article
Language
en
Open access
closed

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CoChat. (2026). Citation check: Damascene copper electroplating for chip interconnections. https://app.cochat.ai/papers/10.1147/rd.425.0567
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Andricacos, P. C., Uzoh, C., Dukovic, J. O., Horkans, J., & Deligianni, H. (1998). Damascene copper electroplating for chip interconnections. IBM Journal of Research and Development. https://doi.org/10.1147/rd.425.0567

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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.