Student or educator? Sign up with your school email and get 6 months of Pro free.
CoChat
Sign Up
Cited by 21

The DOI matches its Crossref record; 1 of the 1 references it cites were found in a registry or an index.

Performance of Parallel Connected SiC MOSFETs under Short Circuits Conditions

Wu, Ruizhu, Mendy, Simon, Agbo, Nereus, Gonzalez, Jose, Jahdi, Saeed, Alatise, Olayiwola·2021·Energies
DOI 10.3390/en14206834
Open this paper in CoChat — free account

Abstract

This paper investigates the impact of parameter variation between parallel connected SiC MOSFETs on short circuit (SC) performance. SC tests are performed on parallel connected devices with different switching rates, junction temperatures and threshold voltages (VTH). The results show that VTH variation is the most critical factor affecting reduced robustness of parallel devices under SC. The SC current conducted per device is shown to increase under parallel connection compared to single device measurements. VTH shift from bias–temperature–instability (BTI) is known to occur in SiC MOSFETs, hence this paper combines BTI and SC tests. The results show that a positive VGS stress on the gate before the SC measurement reduces the peak SC current by a magnitude that is proportional to VGS stress time. Repeating the measurements at elevated temperatures reduces the time dependency of the VTH shift, thereby indicating thermal acceleration of negative charge trapping. VTH recovery is also observed using SC measurements. Similar measurements are performed on Si IGBTs with no observable impact of VGS stress on SC measurements. In conclusion, a test methodology for investigating the impact of BTI on SC characteristics is presented along with key results showing the electrothermal dynamics of parallel devices under SC conditions.

Overview

The claims and statistics of this paper haven’t been checked yet.

Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.

A few free checks a day · papers already verified open instantly · results are public

Integrity signals

Registry

Crossref · 10.3390/en14206834

Cites

1 of 1 references verified0 citation errors · 0 not checkable

Statistics

Figures

Figure 1 Experiment setup: ( a ) experimental test -rig circuit diagram for short circuit measurements; ( b ) experimental test -rig picture.
Figure 1 Experiment setup: ( a ) experimental test -rig circuit diagram for short circuit measurements; ( b ) experimental test -rig picture.CC-BY · From the PDF
Image 2
CC-BY · From the PDF
Figure 2 Short circuit measurements for VDS and current in SiC MOSFET with VGS = 15 V, 17 V and 20 V.
Figure 2 Short circuit measurements for VDS and current in SiC MOSFET with VGS = 15 V, 17 V and 20 V.CC-BY · From the PDF
Figure 3 Short circuit measurements for VDS and current in SiC MOSFET with RG = 68, 100 and 120 Ω .
Figure 3 Short circuit measurements for VDS and current in SiC MOSFET with RG = 68, 100 and 120 Ω .CC-BY · From the PDF
Figure 4 Measurements of SC current for a single SiC MOSFET and 2 parallel SiC MOSFETs.
Figure 4 Measurements of SC current for a single SiC MOSFET and 2 parallel SiC MOSFETs.CC-BY · From the PDF
Figure 5 Equivalent circuit of devices under test: ( a ) single device under short circuit; ( b ) parallel -connected devices under short circuit.
Figure 5 Equivalent circuit of devices under test: ( a ) single device under short circuit; ( b ) parallel -connected devices under short circuit.CC-BY · From the PDF
Figure 6 Measurement of the short circuit currents through a 650 V SiC Trench MOSFET under single device short circuit condition and under parallel short circuit condition.
Figure 6 Measurement of the short circuit currents through a 650 V SiC Trench MOSFET under single device short circuit condition and under parallel short circuit condition.CC-BY · From the PDF
Figure 7 Calculated peak SC current for single and parallel MOSFET as a function of total loop inductance.
Figure 7 Calculated peak SC current for single and parallel MOSFET as a function of total loop inductance.CC-BY · From the PDF
Figure 8 VTH distribution on devices from different manufacturers.
Figure 8 VTH distribution on devices from different manufacturers.CC-BY · From the PDF
Figure 9 Measured short circuit current for parallel 1.2 kV/20 A SiC MOSFETs with 25% difference in VTH : ( a ) VGS = 17 V; ( b ) VGS = 15 V.
Figure 9 Measured short circuit current for parallel 1.2 kV/20 A SiC MOSFETs with 25% difference in VTH : ( a ) VGS = 17 V; ( b ) VGS = 15 V.CC-BY · From the PDF
Figure 10 Measured short circuit current for parallel 1.7 kV/5 A SiC MOSFETs with 12.8% difference in VTH .
Figure 10 Measured short circuit current for parallel 1.7 kV/5 A SiC MOSFETs with 12.8% difference in VTH .CC-BY · From the PDF
Figure 11 Measured short circuit current for parallel 1.2 kV/20 A SiC MOSFETs with 100% and 500% difference in Tj.
Figure 11 Measured short circuit current for parallel 1.2 kV/20 A SiC MOSFETs with 100% and 500% difference in Tj.CC-BY · From the PDF
Figure 12 Measured short circuit current for parallel 1.7 kV/5 A SiC MOSFETs with different junc -tion temperatures.
Figure 12 Measured short circuit current for parallel 1.7 kV/5 A SiC MOSFETs with different junc -tion temperatures.CC-BY · From the PDF
Figure 13 Measured short circuit current for parallel 1.2 kV/20 A SiC MOSFETs with 20% and 370% difference in RG.
Figure 13 Measured short circuit current for parallel 1.2 kV/20 A SiC MOSFETs with 20% and 370% difference in RG.CC-BY · From the PDF
Figure 14 Gate pulse signals for the IGBT and DUT for BTI and SC tests.
Figure 14 Gate pulse signals for the IGBT and DUT for BTI and SC tests.CC-BY · From the PDF
Figure 15 Impact of BTI on SC currents for devices: ( a ) 1.2 kV SiC Trench MOSFET; ( b ) 1.2 kV SiC Planar MOSFET; ( c ) 650 V Silicon IGBT; ( d ) SC measurements performed on fully recovered SiC Planar MOSFET showing VTH is restored to its pre -test value.
Figure 15 Impact of BTI on SC currents for devices: ( a ) 1.2 kV SiC Trench MOSFET; ( b ) 1.2 kV SiC Planar MOSFET; ( c ) 650 V Silicon IGBT; ( d ) SC measurements performed on fully recovered SiC Planar MOSFET showing VTH is restored to its pre -test value.CC-BY · From the PDF
Figure 16 Impact of BTI on SC charge for 1.2 kV SiC MOSFETs and Si IGBT at a case temperature of ( a ) 25 °C, and ( b ) 150 °C. Impact of VGS stress time is apparent for SiC MOSFETs.
Figure 16 Impact of BTI on SC charge for 1.2 kV SiC MOSFETs and Si IGBT at a case temperature of ( a ) 25 °C, and ( b ) 150 °C. Impact of VGS stress time is apparent for SiC MOSFETs.CC-BY · From the PDF
Figure 17 Measured SC power and simulated temperature for the parallel 1.2 kV SiC MOSFETs with 25% difference in VTH : ( a ) measured SC power; ( b ) simulated temperature.
Figure 17 Measured SC power and simulated temperature for the parallel 1.2 kV SiC MOSFETs with 25% difference in VTH : ( a ) measured SC power; ( b ) simulated temperature.CC-BY · From the PDF
Figure 18 Simulated SC current and hot -spot temperature using finite elemental model and 2D plot results taken at 4 us into the short circuit for the SiC MOSFET: ( a ) simulated SC current and hot -spot temperature; ( b ) 2D current density plot ( VTH = 4.92 V); ( c ) 2D current density plot ( VTH = 5.12 V); ( d ) 2D temperature contour plot of the SiC MOSFET ( VTH = 4.92 V); ( e ) 2D temperature contour plot of the SiC MOSFET ( VTH = 5.12 V).
Figure 18 Simulated SC current and hot -spot temperature using finite elemental model and 2D plot results taken at 4 us into the short circuit for the SiC MOSFET: ( a ) simulated SC current and hot -spot temperature; ( b ) 2D current density plot ( VTH = 4.92 V); ( c ) 2D current density plot ( VTH = 5.12 V); ( d ) 2D temperature contour plot of the SiC MOSFET ( VTH = 4.92 V); ( e ) 2D temperature contour plot of the SiC MOSFET ( VTH = 5.12 V).CC-BY · From the PDF

Verification

Claims the paper makes

The claims and statistics of this paper haven’t been checked yet.

Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.

A few free checks a day · papers already verified open instantly · results are public

Claims other papers make about this one

Each is checked against this paper’s own text: does it say what the citing paper says it does?

Self-check

Percentages, sums and reported differences re-computed from the paper’s own numbers.

The self-check needs the paper’s full text.

Citations

Cites

Show all 1 references

Research works printed but not linked: 33

  1. Sun, J., Xu, H., Wu, X., Yang, S., Guo, Q., and Sheng, K. (June, January 28). Short circuit capability and high temperature channel mobility of SiC MOSFETs. Proceedings of the 2017 29th International Symposium on Power Semiconductor Devices and IC’s (ISPSD), Sapporo, Japan. · DOI
  2. Romano, 2016, A Comprehensive study of short-circuit ruggedness of silicon carbide power MOSFETs, IEEE J. Emerg. Sel. Top. Power Electron., 4, 978, 10.1109/JESTPE.2016.2563220 · DOI
  3. Castellazzi, 2016, SiC power MOSFETs performance, robustness and technology maturity, Microelectron. Reliab., 58, 164, 10.1016/j.microrel.2015.12.034 · DOI
  4. Qin, H., Dong, Y., Xu, K., Xu, H., Fu, D., Wang, S., and Zhao, C. (2017, January 18–20). A comprehensive study of the short-circuit characteristics of SiC MOSFETs. Proceedings of the 2017 12th IEEE Conference on Industrial Electronics and Applications (ICIEA), Siem Reap, Cambodia. · DOI
  5. Xing, D., Hu, B., Yu, S., Zhang, Y., Liu, T., Salemi, A., Kang, M., Wang, J., and Agarwal, A. (October, January 29). Current saturation characteristics and single-pulse short-circuit tests of commercial SiC MOSFETs. Proceedings of the 2019 IEEE Energy Conversion Congress and Exposition (ECCE), Baltimoe, MD, USA. · DOI
  6. Romano, G., Maresca, L., Riccio, M., D’Alessandro, V., Breglio, G., Irace, A., Fayyaz, A., and Castellazzi, A. (2015, January 10–14). Short-circuit failure mechanism of SiC power MOSFETs. Proceedings of the 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC’s (ISPSD), Hong Kong, China. · DOI
  7. Okawa, M., Aiba, R., Kanamori, T., Yano, H., Iwamuro, N., and Harada, S. (2019, January 19–23). Experimental and numerical investigations of short-circuit failure mechanisms for state-of-the-art 1.2 kV SiC trench MOSFETs. Proceedings of the 2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD), Shanghai, China. · DOI
  8. Chen, 2021, Investigation on short-circuit characterization and optimization of 3.3-kV SiC MOSFETs, IEEE Trans. Electron. Devices, 68, 184, 10.1109/TED.2020.3037262 · DOI
  9. Agarwal, A., Kanale, A., Han, K., Baliga, B.J., and Bhattacharya, S. (2019, January 29–31). Impact of gate oxide thickness on switching and short circuit performance of 1200 V 4H-SiC inversion-channel MOSFETs. Proceedings of the 2019 IEEE 7th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), Raleigh, NC, USA. · DOI
  10. Tani, K., Sakano, J.I., and Shima, A. (2018, January 14–17). Analysis of short-circuit break-down point in 3.3 kV SiC-MOSFETs. Proceedings of the 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Chicago, IL, USA. · DOI
  11. Agarwal, A., Kanale, A., Han, K., and Baliga, B.J. (2020, January 13–18). Switching and short-circuit performance of 27 nm gate oxide, 650 V SiC planar-gate MOSFETs with 10 to 15 V gate drive voltage. Proceedings of the 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vienna, Austria. · DOI
  12. Sun, 2019, Short circuit capability and short circuit induced VTH instability of a 1.2-kV SiC power MOSFET, IEEE J. Emerg. Sel. Top. Power Electron., 7, 1539, 10.1109/JESTPE.2019.2912623 · DOI
  13. Zou, Q., Ke, J., Peng, J., and Zhao, Z. (2019, January 11–14). Effect of parasitic inductance mismatch on short-circuit characterization of paralleled SiC MOSFETs. Proceedings of the 2019 4th IEEE Workshop on the Electronic Grid (eGRID), Xiamen, China. · DOI
  14. Ionita, C., Nawaz, M., Ilves, K., and Iannuzzo, F. (2017). 2017 IEEE Energy Conversion Congress and Exposition (ECCE), IEEE.
  15. An, J., Namai, M., Yano, H., Iwamuro, N., Kobayashi, Y., and Harada, S. (2018, January 13–17). Methodology for enhanced short-circuit capability of SiC MOSFETs. Proceedings of the 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Chicago, IL, USA. · DOI
  16. Richardeau, F., Boige, F., Castellazzi, A., Chazal, V., Fayyaz, A., Borghese, A., Irace, A., and Guibaud, G. (2020, January 13–18). SiC MOSFETs soft and hard failure modes: Functional analysis and structural characterization. Proceedings of the 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vienna, Austria. · DOI
  17. Unger, C., and Pfost, M. (2020, January 13–18). Investigation of gate and drain leakage currents during the short circuit of SiC-MOSFETs. Proceedings of the 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vienna, Austria. · DOI
  18. Wei, 2018, Comprehensive analysis of electrical parameters degradations for SiC power MOSFETs under repetitive short-circuit stress, IEEE Trans. Electron. Devices, 65, 5440, 10.1109/TED.2018.2873672 · DOI
  19. Du, H., Reigosa, P.D., Iannuzzo, F., and Ceccarelli, L. (2019, January 17–21). Impact of the case temperature on the reliability of SiC MOSFETs under repetitive short circuit tests. Proceedings of the 2019 IEEE Applied Power Electronics Conference and Exposition (APEC), Anaheim, CA, USA. · DOI
  20. Zhou, 2016, Investigations on the degradation of 1.2-kV 4H-SiC MOSFETs under repetitive short-circuit tests, IEEE Trans. Electron. Devices, 63, 4346, 10.1109/TED.2016.2606882 · DOI
  21. Xing, D., Lyu, X., Liu, J., Xie, C., Agarwal, A., and Wang, J. (2021, January 14–17). 3300-V SiC MOSFET short-circuit reliability and protection. Proceedings of the 2021 IEEE Applied Power Electronics Conference and Exposition (APEC), Online Conference. · DOI
  22. Xing, D., Xie, C., Wang, K., Liu, T., Hu, B., Wang, J., Agarwal, A., Singh, R., and Atcitty, S. (2020, January 23–25). 3.3-kV SiC MOSFET performance and short-circuit capability. In Proceedings of the 2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia), Online Conference. · DOI
  23. Ji, S., Laitinen, M., Huang, X., Sun, J., Giewont, B., Tolbert, L.M., and Wang, F. (2018, January 4–8). Short circuit characterization of 3rd generation 10 kV SiC MOSFET. Proceedings of the 2018 IEEE Applied Power Electronics Conference and Exposition (APEC), San Antonio, TX, USA. · DOI
  24. Ji, 2019, Short-circuit characterization and protection of 10-kV SiC mosfet, IEEE Trans. Power Electron., 34, 1755, 10.1109/TPEL.2018.2834463 · DOI
  25. Reigosa, 2017, A short-circuit safe operation area identification criterion for SiC MOSFET power modules, IEEE Trans. Ind. Appl., 53, 2880, 10.1109/TIA.2016.2628895 · DOI · Paper page
  26. Kadavelugu, A., Aeloiza, E., and Belcastro, C. (November, January 30). Short-circuit performance of multi-chip SiC MOSFET modules. Proceedings of the 2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), Albuquerque, NM, USA. · DOI
  27. Ke, 2019, Device screening strategy for balancing short-circuit behavior of paralleling silicon carbide MOSFETs, IEEE Trans. Device Mater. Reliab., 19, 757, 10.1109/TDMR.2019.2949449 · DOI
  28. Boige, F., Fayyaz, A., Castellazzi, A., Richardeau, F., and Vinnac, S. (2019, January 2–5). Short-circuit robustness of parallel SiC MOSFETs and fail-safe mode strategy. Proceedings of the 2019 21st European Conference on Power Electronics and Applications (EPE ’19 ECCE Europe), Genova, Italy. · DOI
  29. Peters, D., Aichinger, T., Basler, T., Rescher, G., Puschkarsky, K., and Reisinger, H. (2018, January 13–17). Investigation of threshold voltage stability of SiC MOSFETs. Proceedings of the 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Chicago, IL, USA. · DOI
  30. Gonzalez, 2021, Impact of BTI-induced threshold voltage shifts in shoot-through currents from crosstalk in SiC MOSFETs, IEEE Trans. Power Electron., 36, 3279, 10.1109/TPEL.2020.3012298 · DOI
  31. Gonzalez, 2019, A novel non-intrusive technique for BTI characterization in SiC mosfets, IEEE Trans. Power Electron., 34, 5737, 10.1109/TPEL.2018.2870067 · DOI
  32. Habersat, 2018, Measurement considerations for evaluating BTI effects in SiC MOSFETs, Microelectron. Reliab., 81, 121, 10.1016/j.microrel.2017.12.015 · DOI
  33. Gonzalez, 2021, Bias temperature instability and junction temperature measurement using electrical parameters in SiC power MOSFETs, IEEE Trans. Ind. Appl., 57, 1664, 10.1109/TIA.2020.3045120 · DOI

Cited by

See all 21

Metadata

Authors
Wu, R., Mendy, S., Agbo, N., Gonzalez, J., Jahdi, S., & Alatise, O.
Venue
Energies
Publisher
MDPI AG
Published
2021-10-19
Volume
14
Issue
20
Pages
6834
ISSN
1996-1073
DOI
10.3390/en14206834
Cited by
21
References
1
Language
en
Licence
creativecommons.org/licenses/by/4.0/ (vor)
Funders
Engineering and Physical Sciences Research Council (EP/R004366/1)

About these checks

Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.

Statistics and arithmetic are recomputed, not judged.

Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.

What counts as a claim ›How we measure confidence ›How we check this ›

Are you an author, or do you see a problem with this page? Request a review

How to cite

Cite CoChat for the checks on this page, and the paper for its own findings.

This page
CoChat. (2026). Citation check: Performance of Parallel Connected SiC MOSFETs under Short Circuits Conditions. https://app.cochat.ai/papers/10.3390/en14206834
The paper
Wu, R., Mendy, S., Agbo, N., Gonzalez, J., Jahdi, S., & Alatise, O. (2021). Performance of Parallel Connected SiC MOSFETs under Short Circuits Conditions. Energies. https://doi.org/10.3390/en14206834

Data sources

Bibliographic data: Semantic Scholar, OpenAlex, Crossref.

Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.